diff options
| author | Peter Chen <peter.chen@freescale.com> | 2013-10-11 11:11:05 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2014-08-27 18:06:17 -0500 |
| commit | ff5914aa395ffc0b45fb60ca634c64db2a6b2dc0 (patch) | |
| tree | 83e64d83319ac63fc7cf51415ea6b844a39a3322 /Documentation | |
| parent | b3a70d7faac4a5fce8a7f7461165e7544e904df0 (diff) | |
ENGR00286426-4 usb: doc: phy-mxs: update binding for adding anatop phandle
Add anatop phandle which is used to access anatop registers to
control PHY's power and other USB operations.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/usb/mxs-phy.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/mxs-phy.txt b/Documentation/devicetree/bindings/usb/mxs-phy.txt index d850e551cefe..059536cd5c78 100644 --- a/Documentation/devicetree/bindings/usb/mxs-phy.txt +++ b/Documentation/devicetree/bindings/usb/mxs-phy.txt @@ -5,10 +5,12 @@ Required properties: for imx6dq and imx6dl, "fsl,imx6sl-usbphy" for imx6sl - reg: Should contain registers location and length - interrupts: Should contain phy interrupt +- fsl,anatop: phandle for anatop register, it is only for imx6 SoC series Example: usbphy1: usbphy@020c9000 { compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; reg = <0x020c9000 0x1000>; interrupts = <0 44 0x04>; + fsl,anatop = <&anatop>; }; |