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authorYan Markman <ymarkman@marvell.com>2016-10-16 00:22:32 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-11-08 10:08:37 +0100
commitbe3390d86bc24dc1ceb38e677f8ea2a1cf78d309 (patch)
tree82cca80d85041aaa885137f0edf8caf2b1680287 /Kbuild
parent26fc85a0113d5a61c62b6c40a21be2c579c1c526 (diff)
ARM: dts: mvebu: pl310-cache disable double-linefill
commit cda80a82ac3e89309706c027ada6ab232be1d640 upstream. Under heavy system stress mvebu SoC using Cortex A9 sporadically encountered instability issues. The "double linefill" feature of L2 cache was identified as causing dependency between read and write which lead to the deadlock. Especially, it was the cause of deadlock seen under heavy PCIe traffic, as this dependency violates PCIE overtaking rule. Fixes: c8f5a878e554 ("ARM: mvebu: use DT properties to fine-tune the L2 configuration") Signed-off-by: Yan Markman <ymarkman@marvell.com> Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Nadav Haklai <nadavh@marvell.com> [gregory.clement@free-electrons.com: reformulate commit log, add Armada 375 and add Fixes tag] Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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