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authorAlex Frid <afrid@nvidia.com>2012-09-04 15:42:28 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 12:33:44 -0700
commitc839d7471f1fac08db4630b3d6a750389fcf9f94 (patch)
treef43cc3af947b08954bc4b02b1917160606ba887d /MAINTAINERS
parentda22ddfe96b9f602015aa0a0aecb8cf1c4b6497e (diff)
ARM: tegra11: clock: Modify pllx and cpu burst policy restore
Removed PLLX and cpu burst policy restoration on Tegra11 from restore_cpu_complex() routine. These settings are preserved across cpu complex rail-gating, and should be restored by common clock suspend/resume code across core rail-gating (LP0 state). Added PLLX restoration to common clock resume procedure (was missing, since it was done in restore_cpu_complex()). Fixed cpu burst policy restoration for LP CPU to make sure PLLX DIV2 bypass is not changing while PLLX is used as cpu clock source. Change-Id: I3425a4ad65c51d9485e1c3240905b3ce3066e74c Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/130856 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R1984894b43e1c16e9f984880e200df68b867a2c2
Diffstat (limited to 'MAINTAINERS')
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