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authorPeter Chen <peter.chen@freescale.com>2014-02-24 10:21:04 +0800
committerFelipe Balbi <balbi@ti.com>2014-03-05 14:40:09 -0600
commit47d1845ffac0af9e4b439277fee50b62aed650a7 (patch)
treeca52c877fb4cbe99ec406ab06313335ef2768b56 /README
parentbf78343800861c65d4004e7f60a03cc9bc2410b3 (diff)
usb: phy: mxs: Add sync time after controller clear phcd
After clear portsc.phcd, PHY needs 200us stable time for switch 32K clock to AHB clock. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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