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authorVineet Gupta <vgupta@synopsys.com>2015-05-11 18:46:22 +0530
committerVineet Gupta <vgupta@synopsys.com>2016-09-30 14:48:15 -0700
commit9efac6798b20ae6b63ce244b569755f3b60d80aa (patch)
treebf19fcd137b4100371ebb5eadca850fac98de42a /arch/arc/plat-sim
parent618a9cd06dd471ac232f5b27325b24d26eba5571 (diff)
ARCv2: Add support for ZeBu Emulation platform for HS cores
The cool thing is that same kernel image can run on - nsim OSCI simulation platform - SDPlite FPGA setups Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/plat-sim')
-rw-r--r--arch/arc/plat-sim/platform.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arc/plat-sim/platform.c b/arch/arc/plat-sim/platform.c
index e4fe51456808..aea87389e44b 100644
--- a/arch/arc/plat-sim/platform.c
+++ b/arch/arc/plat-sim/platform.c
@@ -24,6 +24,7 @@ static const char *simulation_compat[] __initconst = {
"snps,nsim_hs",
"snps,nsimosci",
"snps,nsimosci_hs",
+ "snps,zebu_hs",
NULL,
};