diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2009-04-30 17:06:09 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-04-30 20:12:50 +0100 |
| commit | 7ce236fcd6fd45b0441a2d49acb2ceb2de2e8a47 (patch) | |
| tree | 1f092413fbe0c91350e7861638dec7bb475c8435 /arch/arm/Kconfig | |
| parent | 9cba3ccc8fe77b67aff2db8f5827d7cb752ce11f (diff) | |
[ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branch
This patch adds the workaround for the 430973 Cortex-A8 (r1p0..r1p2)
erratum. The BTAC/BTB is now flushed at every context switch.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/Kconfig')
| -rw-r--r-- | arch/arm/Kconfig | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e28a76bd1793..84e4816362b3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -749,6 +749,22 @@ config ARM_ERRATA_411920 It does not affect the MPCore. This option enables the ARM Ltd. recommended workaround. +config ARM_ERRATA_430973 + bool "ARM errata: Stale prediction on replaced interworking branch" + depends on CPU_V7 + help + This option enables the workaround for the 430973 Cortex-A8 + (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb + interworking branch is replaced with another code sequence at the + same virtual address, whether due to self-modifying code or virtual + to physical address re-mapping, Cortex-A8 does not recover from the + stale interworking branch prediction. This results in Cortex-A8 + executing the new code sequence in the incorrect ARM or Thumb state. + The workaround enables the BTB/BTAC operations by setting ACTLR.IBE + and also flushes the branch target cache at every context switch. + Note that setting specific bits in the ACTLR register may not be + available in non-secure mode. + endmenu source "arch/arm/common/Kconfig" |