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authorBarry Song <Baohua.Song@csr.com>2012-06-19 15:00:05 +0800
committerBarry Song <Barry.Song@csr.com>2012-07-02 10:59:07 +0800
commit5130216265f6f924a4ba8214787241be96d93467 (patch)
tree8e05e98068f0380376735a8575af9bb42ab27502 /arch/arm/Kconfig
parentca24a145573124732152daff105ba68cc9a2b545 (diff)
PINCTRL: SiRF: add GPIO and GPIO irq support in CSR SiRFprimaII
In SiRFprimaII, Each GPIO pin can be configured as input or output independently. If a GPIO is configured as input, it can also be enabled as an interrupt source (either edge or level triggered). These pins must be either MUXed as GPIO or other function pads. Signed-off-by: Yuping Luo <yuping.luo@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a91009c61870..571b3d25c9bc 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -389,6 +389,7 @@ config ARCH_PRIMA2
bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
select CPU_V7
select NO_IOPORT
+ select ARCH_WANT_OPTIONAL_GPIOLIB
select GENERIC_CLOCKEVENTS
select CLKDEV_LOOKUP
select GENERIC_IRQ_CHIP