diff options
| author | Roger Quadros <rogerq@ti.com> | 2014-09-04 15:36:03 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2014-11-24 07:55:53 -0800 |
| commit | 9e63b0d4ae8837393f94a59e28c04af09abc673c (patch) | |
| tree | d2b11e7893be69211cbd286056a561d01fbe4ba9 /arch/arm/boot/dts/am4372.dtsi | |
| parent | 3a51dec128b47f4cf5d797aa35d24988e0bee571 (diff) | |
ARM: dts: am4372: Add DCAN nodes
The SoC contains 2 DCAN modules. Add them.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am4372.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am4372.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 42d791c4ad73..d42d7865dd53 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -922,6 +922,28 @@ compatible = "mmio-sram"; reg = <0x40300000 0x40000>; /* 256k */ }; + + dcan0: can@481cc000 { + compatible = "ti,am4372-d_can", "ti,am3352-d_can"; + ti,hwmods = "d_can0"; + clocks = <&dcan0_fck>; + clock-names = "fck"; + reg = <0x481cc000 0x2000>; + syscon-raminit = <&am43xx_control_module 0x644 0>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + dcan1: can@481d0000 { + compatible = "ti,am4372-d_can", "ti,am3352-d_can"; + ti,hwmods = "d_can1"; + clocks = <&dcan1_fck>; + clock-names = "fck"; + reg = <0x481d0000 0x2000>; + syscon-raminit = <&am43xx_control_module 0x644 1>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; }; }; |