diff options
| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-03-03 11:43:17 +0100 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2015-03-17 09:08:21 +0100 |
| commit | a87cd07b88b4797d50d11fa1089705a284ae087f (patch) | |
| tree | b33cc119f283471372923bb6850f1b5e10466a02 /arch/arm/boot/dts/armada-370-xp.dtsi | |
| parent | 0c2d652f0bd9fdfe367eca4ebf56ad354bf3b153 (diff) | |
ARM: mvebu: Enable Performance Monitor Unit on Armada XP/370 SoCs
The Armada 370 and XP SoCs have Cortex-A9 compatible CPUs, and with a
Performance Monitoring Unit.
Enable it so that we can have hardware-assisted perf support.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/armada-370-xp.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/armada-370-xp.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 7b3393e264f8..ec96f0b36346 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -73,6 +73,11 @@ }; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts-extended = <&mpic 3>; + }; + soc { #address-cells = <2>; #size-cells = <1>; |