ARM: dts: mvebu: Convert all the mvebu files to use the range property

This conversion will allow to keep 32 bits addresses for the internal
registers whereas the memory of the system will be 64 bits.
Later it will also ease the move of the mvebu-mbus driver to the
device tree support.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

1 files changed, 36 insertions, 35 deletions

diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index ef3d41362241..465b9fa116ea 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -22,83 +22,84 @@
 	model = "Marvell Armada XP family SoC";
 	compatible = "marvell,armadaxp", "marvell,armada-370-xp";
 
+
 	soc {
 		L2: l2-cache {
 			compatible = "marvell,aurora-system-cache";
-			reg = <0xd0008000 0x1000>;
+			reg = <0x08000 0x1000>;
 			cache-id-part = <0x100>;
 			wt-override;
 		};
 
-		mpic: interrupt-controller@d0020000 {
-		      reg = <0xd0020a00 0x2d0>,
-			    <0xd0021070 0x58>;
+		mpic: interrupt-controller@20000 {
+		      reg = <0x20a00 0x2d0>,
+			    <0x21070 0x58>;
 		};
 
-		armada-370-xp-pmsu@d0022000 {
+		armada-370-xp-pmsu@22000 {
 			compatible = "marvell,armada-370-xp-pmsu";
-			reg = <0xd0022100 0x430>,
-			      <0xd0020800 0x20>;
+			reg = <0x22100 0x430>,
+			      <0x20800 0x20>;
 		};
 
-		serial@d0012200 {
+		serial@12200 {
 				compatible = "snps,dw-apb-uart";
-				reg = <0xd0012200 0x100>;
+				reg = <0x12200 0x100>;
 				reg-shift = <2>;
 				interrupts = <43>;
 				reg-io-width = <1>;
 				status = "disabled";
 		};
-		serial@d0012300 {
+		serial@12300 {
 				compatible = "snps,dw-apb-uart";
-				reg = <0xd0012300 0x100>;
+				reg = <0x12300 0x100>;
 				reg-shift = <2>;
 				interrupts = <44>;
 				reg-io-width = <1>;
 				status = "disabled";
 		};
 
-		timer@d0020300 {
+		timer@20300 {
 				marvell,timer-25Mhz;
 		};
 
-		coreclk: mvebu-sar@d0018230 {
+		coreclk: mvebu-sar@18230 {
 			compatible = "marvell,armada-xp-core-clock";
-			reg = <0xd0018230 0x08>;
+			reg = <0x18230 0x08>;
 			#clock-cells = <1>;
 		};
 
-		cpuclk: clock-complex@d0018700 {
+		cpuclk: clock-complex@18700 {
 			#clock-cells = <1>;
 			compatible = "marvell,armada-xp-cpu-clock";
-			reg = <0xd0018700 0xA0>;
+			reg = <0x18700 0xA0>;
 			clocks = <&coreclk 1>;
 		};
 
-		gateclk: clock-gating-control@d0018220 {
+		gateclk: clock-gating-control@18220 {
 			compatible = "marvell,armada-xp-gating-clock";
-			reg = <0xd0018220 0x4>;
+			reg = <0x18220 0x4>;
 			clocks = <&coreclk 0>;
 			#clock-cells = <1>;
 		};
 
-		system-controller@d0018200 {
+		system-controller@18200 {
 				compatible = "marvell,armada-370-xp-system-controller";
-				reg = <0xd0018200 0x500>;
+				reg = <0x18200 0x500>;
 		};
 
-		ethernet@d0030000 {
+		ethernet@30000 {
 				compatible = "marvell,armada-370-neta";
-				reg = <0xd0030000 0x2500>;
+				reg = <0x30000 0x2500>;
 				interrupts = <12>;
 				clocks = <&gateclk 2>;
 				status = "disabled";
 		};
 
-		xor@d0060900 {
+		xor@60900 {
 			compatible = "marvell,orion-xor";
-			reg = <0xd0060900 0x100
-			       0xd0060b00 0x100>;
+			reg = <0x60900 0x100
+			       0x60b00 0x100>;
 			clocks = <&gateclk 22>;
 			status = "okay";
 
@@ -115,10 +116,10 @@
 			};
 		};
 
-		xor@d00f0900 {
+		xor@f0900 {
 			compatible = "marvell,orion-xor";
-			reg = <0xd00F0900 0x100
-			       0xd00F0B00 0x100>;
+			reg = <0xF0900 0x100
+			       0xF0B00 0x100>;
 			clocks = <&gateclk 28>;
 			status = "okay";
 
@@ -135,26 +136,26 @@
 			};
 		};
 
-		usb@d0050000 {
+		usb@50000 {
 			clocks = <&gateclk 18>;
 		};
 
-		usb@d0051000 {
+		usb@51000 {
 			clocks = <&gateclk 19>;
 		};
 
-		usb@d0052000 {
+		usb@52000 {
 			compatible = "marvell,orion-ehci";
-			reg = <0xd0052000 0x500>;
+			reg = <0x52000 0x500>;
 			interrupts = <47>;
 			clocks = <&gateclk 20>;
 			status = "disabled";
 		};
 
-		thermal@d00182b0 {
+		thermal@182b0 {
 			compatible = "marvell,armadaxp-thermal";
-			reg = <0xd00182b0 0x4
-			       0xd00184d0 0x4>;
+			reg = <0x182b0 0x4
+			       0x184d0 0x4>;
 			status = "okay";
 		};
 	};