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authorArnaud Ebalard <arno@natisbad.org>2014-11-22 17:23:30 +0100
committerJason Cooper <jason@lakedaemon.net>2014-11-26 04:05:05 +0000
commit70ee4e9d9f054e258480fd51c90cfc2b72be8b78 (patch)
tree105e3c29a66d2882693b734318b1eecb453f47a3 /arch/arm/boot/dts/armada-xp.dtsi
parenta02fe6452202f1005a69f1310cc322630f68f3ae (diff)
arm: mvebu: normalize pinctrl entries for Armada SoCs
There are currently 2 differents naming conventions used between the existing Armada SoC DT files for pinctrl entries (*_pin(s): *-pin(s) and pmx_*: pmx-*) with a vast majority of files using the former: $ grep _pin arch/arm/boot/dts/armada-*.dts* | wc -l 155 $ grep pmx arch/arm/boot/dts/armada-*.dts* | wc -l 13 In fact, only some Armada XP files are using the second variant. This patch normalizes those files (mainly ge0/1 entries) to use the first variant. Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/00114c3169e1d93259ff4150ed46ee36eae16b1e.1416670812.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp.dtsi')
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index bdb36a05c039..a2a6451524dc 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -212,7 +212,7 @@
};
&pinctrl {
- pmx_ge0_gmii: pmx-ge0-gmii {
+ ge0_gmii_pins: ge0-gmii-pins {
marvell,pins =
"mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp6", "mpp7",
@@ -223,7 +223,7 @@
marvell,function = "ge0";
};
- pmx_ge0_rgmii: pmx-ge0-rgmii {
+ ge0_rgmii_pins: ge0-rgmii-pins {
marvell,pins =
"mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp6", "mpp7",
@@ -231,7 +231,7 @@
marvell,function = "ge0";
};
- pmx_ge1_rgmii: pmx-ge1-rgmii {
+ ge1_rgmii_pins: ge1-rgmii-pins {
marvell,pins =
"mpp12", "mpp13", "mpp14", "mpp15",
"mpp16", "mpp17", "mpp18", "mpp19",