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authorOlof Johansson <olof@lixom.net>2013-10-28 14:39:03 -0700
committerOlof Johansson <olof@lixom.net>2013-10-28 14:39:03 -0700
commit43d93947a54cf9323198a3a37eaf3ec14adb23e1 (patch)
tree0c290a7fcbc644b94527f399e4f9509a8d379a5d /arch/arm/boot/dts/at91sam9x5.dtsi
parent02673f94d04e629e4cdc41e2bf2dc980743cf3df (diff)
parent54b89756a14aa1043507ce0811b4b6c02c5dddcc (diff)
Merge tag 'omap-for-v3.13/cm-scm-cleanup-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
From Paul Walmsley <paul@pwsan.com> via Tony Lindgren: Move some of the OMAP2+ CM and System Control Module direct register accesses into CM- and System Control Module-specific "drivers" underneath arch/arm/mach-omap2/. This is a prerequisite for moving this code out of arch/arm/mach-omap2/ into drivers/. Basic test logs are available here: http://www.pwsan.com/omap/testlogs/cm_scm_cleanup_a_v3.13/20131019101809/ * tag 'omap-for-v3.13/cm-scm-cleanup-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP3: control: add API for setting IVA bootmode ARM: OMAP3: CM/control: move CM scratchpad save to CM driver ARM: OMAP3: McBSP: do not access CM register directly ARM: OMAP3: clock: add API to enable/disable autoidle for a single clock ARM: OMAP2: CM/PM: remove direct register accesses outside CM code + Linux 3.12-rc4 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9x5.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 417899002c41..40267a116c3c 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -190,12 +190,12 @@
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
};
- pinctrl_uart2_rts: uart2_rts-0 {
+ pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
};
- pinctrl_uart2_cts: uart2_cts-0 {
+ pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
};
@@ -505,6 +505,7 @@
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
dma-names = "rxtx";
+ pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -516,6 +517,7 @@
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
dma-names = "rxtx";
+ pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";