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authorLinus Torvalds <torvalds@linux-foundation.org>2015-09-10 17:59:04 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2015-09-10 17:59:04 -0700
commitd71fc239b6915a8b750e9a447311029ff45b6580 (patch)
treeeba70a9d2a9c5c60050a47bff317592cea326660 /arch/arm/boot/dts/exynos4412.dtsi
parent519f526d391b0ef775aeb04c4b6f632ea6b3ee50 (diff)
parentc6e59bdac940e63cfabd40a89d342eb470b009b9 (diff)
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull late ARM SoC updates from Kevin Hilman: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. The bulk of the changes are for samsung/exynos SoCs for some changes that needed a few minor reworks so ended up a bit late. The others are mainly for qcom SoCs: a couple fixes and some DTS updates" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits) ARM: multi_v7_defconfig: Enable PBIAS regulator soc: qcom: smd: Correct fBLOCKREADINTR handling soc: qcom: smd: Use correct remote processor ID soc: qcom: smem: Fix errant private access ARM: dts: qcom: msm8974-sony-xperia-honami: Use stdout-path ARM: dts: qcom: msm8960-cdp: Use stdout-path ARM: dts: qcom: msm8660-surf: Use stdout-path ARM: dts: qcom: ipq8064-ap148: Use stdout-path ARM: dts: qcom: apq8084-mtp: Use stdout-path ARM: dts: qcom: apq8084-ifc6540: Use stdout-path ARM: dts: qcom: apq8074-dragonboard: Use stdout-path ARM: dts: qcom: apq8064-ifc6410: Use stdout-path ARM: dts: qcom: apq8064-cm-qs600: Use stdout-path ARM: dts: qcom: Label serial nodes for aliasing and stdout-path reset: ath79: Fix missing spin_lock_init reset: Add (devm_)reset_control_get stub functions ARM: EXYNOS: switch to using generic cpufreq driver for exynos4x12 cpufreq: exynos: Remove unselectable rule for arm-exynos-cpufreq.o ARM: dts: add iommu property to JPEG device for exynos4 ARM: dts: enable SPI1 for exynos4412-odroidu3 ...
Diffstat (limited to 'arch/arm/boot/dts/exynos4412.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi83
1 files changed, 83 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index b78ada70bd05..ca0e3c15977f 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -30,6 +30,9 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA00>;
+ clocks = <&clock CLK_ARM_CLK>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
cooling-min-level = <13>;
cooling-max-level = <7>;
#cooling-cells = <2>; /* min followed by max */
@@ -39,18 +42,98 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA01>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu@A02 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA02>;
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu@A03 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA03>;
+ operating-points-v2 = <&cpu0_opp_table>;
+ };
+ };
+
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <200000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <200000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <925000>;
+ clock-latency-ns = <200000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <950000>;
+ clock-latency-ns = <200000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000>;
+ clock-latency-ns = <200000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <700000000>;
+ opp-microvolt = <987500>;
+ clock-latency-ns = <200000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <1000000>;
+ clock-latency-ns = <200000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <900000000>;
+ opp-microvolt = <1037500>;
+ clock-latency-ns = <200000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <1087500>;
+ clock-latency-ns = <200000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1100000000>;
+ opp-microvolt = <1137500>;
+ clock-latency-ns = <200000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1187500>;
+ clock-latency-ns = <200000>;
+ };
+ opp11 {
+ opp-hz = /bits/ 64 <1300000000>;
+ opp-microvolt = <1250000>;
+ clock-latency-ns = <200000>;
+ };
+ opp12 {
+ opp-hz = /bits/ 64 <1400000000>;
+ opp-microvolt = <1287500>;
+ clock-latency-ns = <200000>;
+ };
+ opp13 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <1350000>;
+ clock-latency-ns = <200000>;
+ turbo-mode;
};
};