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authorMark Brown <broonie@linaro.org>2013-12-21 07:24:26 +0900
committerKukjin Kim <kgene.kim@samsung.com>2013-12-21 08:24:39 +0900
commit24b714f8d17127af0d33b242c2b5653686adf61b (patch)
tree2bd75b0cf5525f04f3f287fbf7af660c76fa2db4 /arch/arm/boot/dts/exynos5250-smdk5250.dts
parent655de648323f633d450032ecd9494995a0759f19 (diff)
ARM: dts: Add CODEC MCLK for SMDK5250
There is a 16.934MHz fixed rate clock connected to MCLK1 on the CODEC, add this to the device tree bindings. Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos5250-smdk5250.dts')
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 3f80c2335d32..f079c4ce3684 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -77,6 +77,9 @@
gpio-controller;
#gpio-cells = <2>;
+ clocks = <&codec_mclk>;
+ clock-names = "MCLK1";
+
AVDD2-supply = <&vdd>;
CPVDD-supply = <&vdd>;
DBVDD-supply = <&dbvdd>;
@@ -271,5 +274,11 @@
compatible = "samsung,clock-xxti";
clock-frequency = <24000000>;
};
+
+ codec_mclk: codec-mclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <16934000>;
+ };
};
};