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authorAlexander Shiyan <shc_work@mail.ru>2014-02-04 18:59:32 +0400
committerShawn Guo <shawn.guo@linaro.org>2014-02-10 11:10:43 +0800
commit51aba3255e5ef60af35efdcd544fef5271c162ae (patch)
tree9b97473d15bb066dbc60e7e2f35b8d507bed44dc /arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
parentb037b9a5c216fc11505497a8f5597123dbf72e29 (diff)
ARM: dts: imx27-phytec-phycard-s-rdk: Add pinctrl definitions for SDHC2
This patch adds pinctrl definitions for SDHC2 for Phytec PCA100 RDK board. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts')
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
index 04cadfcb32f1..1cd3a879dc85 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
@@ -88,6 +88,18 @@
>;
};
+ pinctrl_sdhc2: sdhc2grp {
+ fsl,pins = <
+ MX27_PAD_SD2_CLK__SD2_CLK 0x0
+ MX27_PAD_SD2_CMD__SD2_CMD 0x0
+ MX27_PAD_SD2_D0__SD2_D0 0x0
+ MX27_PAD_SD2_D1__SD2_D1 0x0
+ MX27_PAD_SD2_D2__SD2_D2 0x0
+ MX27_PAD_SD2_D3__SD2_D3 0x0
+ MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX27_PAD_UART1_TXD__UART1_TXD 0x0
@@ -124,6 +136,8 @@
};
&sdhci2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhc2>;
cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
status = "okay";
};