diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-01 18:28:06 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-01 18:28:06 -0700 |
commit | 2a2bf85f05e42b12ea6bfe821e2d19221cf93555 (patch) | |
tree | 11abcdaef6e4f8307574056998d306d21558b6ed /arch/arm/boot/dts/imx53.dtsi | |
parent | 11801e9de26992d37cb869cc74f389b6a7677e0e (diff) | |
parent | 99261fbad0a16f105b262d7525801697588ba526 (diff) |
Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc device tree updates from Olof Johansson:
"Device tree conversion and enablement branch. Mostly a bunch of new
bindings and setup for various platforms, but the Via/Winchip VT8500
platform is also converted over from being 100% legacy to now use
device tree for probing. More of that will come for 3.8."
Trivial conflicts due to removal of vt8500 files, and one documentation
file that was added with slightly different contents both here and in
the USb tree.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (212 commits)
arm: vt8500: Fixup for missing gpio.h
ARM: LPC32xx: LED fix in PHY3250 DTS file
ARM: dt: mmp-dma: add binding file
arm: vt8500: Update arch-vt8500 to devicetree support.
arm: vt8500: gpio: Devicetree support for arch-vt8500
arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices
arm: vt8500: clk: Add Common Clock Framework support
video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb
serial: vt8500: Add devicetree support for vt8500-serial
rtc: vt8500: Add devicetree support for vt8500-rtc
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's
ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support
ARM: tegra: Add Avionic Design Medcom-Wide support
ARM: tegra: Add Avionic Design Plutux support
ARM: tegra: Add Avionic Design Tamonten support
ARM: tegra: dts: Add pwm label
ARM: ux500: Fix SSP register address format
ARM: ux500: Apply tc3589x's GPIO/IRQ properties to HREF's DT
ARM: ux500: Remove redundant #gpio-cell properties from Snowball DT
ARM: ux500: Add all encompassing sound node to the HREF Device Tree
...
Diffstat (limited to 'arch/arm/boot/dts/imx53.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx53.dtsi | 199 |
1 files changed, 198 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index cd37165edce5..221cf3321b0a 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -135,6 +135,34 @@ }; }; + usb@53f80000 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80000 0x0200>; + interrupts = <18>; + status = "disabled"; + }; + + usb@53f80200 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80200 0x0200>; + interrupts = <14>; + status = "disabled"; + }; + + usb@53f80400 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80400 0x0200>; + interrupts = <16>; + status = "disabled"; + }; + + usb@53f80600 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80600 0x0200>; + interrupts = <17>; + status = "disabled"; + }; + gpio1: gpio@53f84000 { compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; reg = <0x53f84000 0x4000>; @@ -179,7 +207,6 @@ compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; reg = <0x53f98000 0x4000>; interrupts = <58>; - status = "disabled"; }; wdog@53f9c000 { /* WDOG2 */ @@ -189,6 +216,161 @@ status = "disabled"; }; + iomuxc@53fa8000 { + compatible = "fsl,imx53-iomuxc"; + reg = <0x53fa8000 0x4000>; + + audmux { + pinctrl_audmux_1: audmuxgrp-1 { + fsl,pins = < + 10 0x80000000 /* MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC */ + 17 0x80000000 /* MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD */ + 23 0x80000000 /* MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS */ + 30 0x80000000 /* MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD */ + >; + }; + }; + + fec { + pinctrl_fec_1: fecgrp-1 { + fsl,pins = < + 820 0x80000000 /* MX53_PAD_FEC_MDC__FEC_MDC */ + 779 0x80000000 /* MX53_PAD_FEC_MDIO__FEC_MDIO */ + 786 0x80000000 /* MX53_PAD_FEC_REF_CLK__FEC_TX_CLK */ + 791 0x80000000 /* MX53_PAD_FEC_RX_ER__FEC_RX_ER */ + 796 0x80000000 /* MX53_PAD_FEC_CRS_DV__FEC_RX_DV */ + 799 0x80000000 /* MX53_PAD_FEC_RXD1__FEC_RDATA_1 */ + 804 0x80000000 /* MX53_PAD_FEC_RXD0__FEC_RDATA_0 */ + 808 0x80000000 /* MX53_PAD_FEC_TX_EN__FEC_TX_EN */ + 811 0x80000000 /* MX53_PAD_FEC_TXD1__FEC_TDATA_1 */ + 816 0x80000000 /* MX53_PAD_FEC_TXD0__FEC_TDATA_0 */ + >; + }; + }; + + ecspi1 { + pinctrl_ecspi1_1: ecspi1grp-1 { + fsl,pins = < + 433 0x80000000 /* MX53_PAD_EIM_D16__ECSPI1_SCLK */ + 439 0x80000000 /* MX53_PAD_EIM_D17__ECSPI1_MISO */ + 445 0x80000000 /* MX53_PAD_EIM_D18__ECSPI1_MOSI */ + >; + }; + }; + + esdhc1 { + pinctrl_esdhc1_1: esdhc1grp-1 { + fsl,pins = < + 995 0x1d5 /* MX53_PAD_SD1_DATA0__ESDHC1_DAT0 */ + 1000 0x1d5 /* MX53_PAD_SD1_DATA1__ESDHC1_DAT1 */ + 1010 0x1d5 /* MX53_PAD_SD1_DATA2__ESDHC1_DAT2 */ + 1024 0x1d5 /* MX53_PAD_SD1_DATA3__ESDHC1_DAT3 */ + 1005 0x1d5 /* MX53_PAD_SD1_CMD__ESDHC1_CMD */ + 1018 0x1d5 /* MX53_PAD_SD1_CLK__ESDHC1_CLK */ + >; + }; + + pinctrl_esdhc1_2: esdhc1grp-2 { + fsl,pins = < + 995 0x1d5 /* MX53_PAD_SD1_DATA0__ESDHC1_DAT0 */ + 1000 0x1d5 /* MX53_PAD_SD1_DATA1__ESDHC1_DAT1 */ + 1010 0x1d5 /* MX53_PAD_SD1_DATA2__ESDHC1_DAT2 */ + 1024 0x1d5 /* MX53_PAD_SD1_DATA3__ESDHC1_DAT3 */ + 941 0x1d5 /* MX53_PAD_PATA_DATA8__ESDHC1_DAT4 */ + 948 0x1d5 /* MX53_PAD_PATA_DATA9__ESDHC1_DAT5 */ + 955 0x1d5 /* MX53_PAD_PATA_DATA10__ESDHC1_DAT6 */ + 962 0x1d5 /* MX53_PAD_PATA_DATA11__ESDHC1_DAT7 */ + 1005 0x1d5 /* MX53_PAD_SD1_CMD__ESDHC1_CMD */ + 1018 0x1d5 /* MX53_PAD_SD1_CLK__ESDHC1_CLK */ + >; + }; + }; + + esdhc2 { + pinctrl_esdhc2_1: esdhc2grp-1 { + fsl,pins = < + 1038 0x1d5 /* MX53_PAD_SD2_CMD__ESDHC2_CMD */ + 1032 0x1d5 /* MX53_PAD_SD2_CLK__ESDHC2_CLK */ + 1062 0x1d5 /* MX53_PAD_SD2_DATA0__ESDHC2_DAT0 */ + 1056 0x1d5 /* MX53_PAD_SD2_DATA1__ESDHC2_DAT1 */ + 1050 0x1d5 /* MX53_PAD_SD2_DATA2__ESDHC2_DAT2 */ + 1044 0x1d5 /* MX53_PAD_SD2_DATA3__ESDHC2_DAT3 */ + >; + }; + }; + + esdhc3 { + pinctrl_esdhc3_1: esdhc3grp-1 { + fsl,pins = < + 943 0x1d5 /* MX53_PAD_PATA_DATA8__ESDHC3_DAT0 */ + 950 0x1d5 /* MX53_PAD_PATA_DATA9__ESDHC3_DAT1 */ + 957 0x1d5 /* MX53_PAD_PATA_DATA10__ESDHC3_DAT2 */ + 964 0x1d5 /* MX53_PAD_PATA_DATA11__ESDHC3_DAT3 */ + 893 0x1d5 /* MX53_PAD_PATA_DATA0__ESDHC3_DAT4 */ + 900 0x1d5 /* MX53_PAD_PATA_DATA1__ESDHC3_DAT5 */ + 906 0x1d5 /* MX53_PAD_PATA_DATA2__ESDHC3_DAT6 */ + 912 0x1d5 /* MX53_PAD_PATA_DATA3__ESDHC3_DAT7 */ + 857 0x1d5 /* MX53_PAD_PATA_RESET_B__ESDHC3_CMD */ + 863 0x1d5 /* MX53_PAD_PATA_IORDY__ESDHC3_CLK */ + >; + }; + }; + + i2c1 { + pinctrl_i2c1_1: i2c1grp-1 { + fsl,pins = < + 333 0xc0000000 /* MX53_PAD_CSI0_DAT8__I2C1_SDA */ + 341 0xc0000000 /* MX53_PAD_CSI0_DAT9__I2C1_SCL */ + >; + }; + }; + + i2c2 { + pinctrl_i2c2_1: i2c2grp-1 { + fsl,pins = < + 61 0xc0000000 /* MX53_PAD_KEY_ROW3__I2C2_SDA */ + 53 0xc0000000 /* MX53_PAD_KEY_COL3__I2C2_SCL */ + >; + }; + }; + + uart1 { + pinctrl_uart1_1: uart1grp-1 { + fsl,pins = < + 346 0x1c5 /* MX53_PAD_CSI0_DAT10__UART1_TXD_MUX */ + 354 0x1c5 /* MX53_PAD_CSI0_DAT11__UART1_RXD_MUX */ + >; + }; + + pinctrl_uart1_2: uart1grp-2 { + fsl,pins = < + 828 0x1c5 /* MX53_PAD_PATA_DIOW__UART1_TXD_MUX */ + 832 0x1c5 /* MX53_PAD_PATA_DMACK__UART1_RXD_MUX */ + >; + }; + }; + + uart2 { + pinctrl_uart2_1: uart2grp-1 { + fsl,pins = < + 841 0x1c5 /* MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX */ + 836 0x1c5 /* MX53_PAD_PATA_DMARQ__UART2_TXD_MUX */ + >; + }; + }; + + uart3 { + pinctrl_uart3_1: uart3grp-1 { + fsl,pins = < + 884 0x1c5 /* MX53_PAD_PATA_CS_0__UART3_TXD_MUX */ + 888 0x1c5 /* MX53_PAD_PATA_CS_1__UART3_RXD_MUX */ + 875 0x1c5 /* MX53_PAD_PATA_DA_1__UART3_CTS */ + 880 0x1c5 /* MX53_PAD_PATA_DA_2__UART3_RTS */ + >; + }; + }; + }; + uart1: serial@53fbc000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53fbc000 0x4000>; @@ -203,6 +385,20 @@ status = "disabled"; }; + can1: can@53fc8000 { + compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; + reg = <0x53fc8000 0x4000>; + interrupts = <82>; + status = "disabled"; + }; + + can2: can@53fcc000 { + compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; + reg = <0x53fcc000 0x4000>; + interrupts = <83>; + status = "disabled"; + }; + gpio5: gpio@53fdc000 { compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; reg = <0x53fdc000 0x4000>; @@ -277,6 +473,7 @@ compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; reg = <0x63fb0000 0x4000>; interrupts = <6>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; }; cspi@63fc0000 { |