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authorShengjiu Wang <shengjiu.wang@freescale.com>2015-12-16 13:16:39 +0800
committerNitin Garg <nitin.garg@nxp.com>2016-01-14 11:02:45 -0600
commitbef020962334c0124165cf26142391eb31d88825 (patch)
tree9f8a5bc328993e075f82bb6006498f46a7e0e458 /arch/arm/boot/dts/imx6dl-sabreauto-enetirq.dts
parentfe86dc3b7e7cec7cb4f3ff52757b0d486beee408 (diff)
MLK-12027: ARM: dts: fix the sample rate clock not accurate for spdif tx
Clock of spdif tx is derived from clk_ipg and clk_osc, which is not the integer multiple size of sample rate, can't generate accurate clock for each sample rate. Use pll4 as the clk_spdif's parent, because the clk_spdif is the one of source clock of tx, use a proper frequency for pll4, then it can generate more accurate clock for sample rate (32k,48k,96k,192k). Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6dl-sabreauto-enetirq.dts')
0 files changed, 0 insertions, 0 deletions