diff options
| author | Shawn Guo <shawn.guo@freescale.com> | 2013-07-26 16:50:49 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:16:30 -0600 |
| commit | 433447339f95dae739e6f87e3193e44255bd776a (patch) | |
| tree | 84c980c5e9c04b9ac892f8116fa1228d871cb341 /arch/arm/boot/dts/imx6dl.dtsi | |
| parent | fc8b01b19a2d0ff9d35415acc2655a219e50249f (diff) | |
ENGR00240988: ARM: dts: add gpu nodes for imx6q and imx6dl
It adds gpu nodes for imx6q and imx6dl.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
[shawn.guo: cherry-pick commit dfbafe2b0b33 from imx_3.10.y, use macro
for clock IDs and IRQ trigger type, and add power-domains]
Diffstat (limited to 'arch/arm/boot/dts/imx6dl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index edb7414c7e38..2f7d876d9798 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -56,6 +56,26 @@ }; soc { + gpu@00130000 { + compatible = "fsl,imx6dl-gpu", "fsl,imx6q-gpu"; + reg = <0x00130000 0x4000>, <0x00134000 0x4000>, + <0x0 0x0>; + reg-names = "iobase_3d", "iobase_2d", + "phys_baseaddr"; + interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>, + <0 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "irq_3d", "irq_2d"; + clocks = <&clks IMX6QDL_CLK_OPENVG_AXI>, <&clks IMX6QDL_CLK_GPU3D_AXI>, + <&clks IMX6QDL_CLK_GPU2D_CORE>, <&clks IMX6QDL_CLK_GPU3D_CORE>, + <&clks IMX6QDL_CLK_DUMMY>; + clock-names = "gpu2d_axi_clk", "gpu3d_axi_clk", + "gpu2d_clk", "gpu3d_clk", + "gpu3d_shader_clk"; + resets = <&src 0>, <&src 3>; + reset-names = "gpu3d", "gpu2d"; + power-domains = <&gpc 1>; + }; + ocram: sram@00900000 { compatible = "mmio-sram"; reg = <0x00900000 0x20000>; |