diff options
| author | Huang Shijie <b32955@freescale.com> | 2013-05-09 11:29:00 +0800 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-06-17 16:04:19 +0800 |
| commit | 32d77d114c5f334419e8ccb5e61baa3236f6a586 (patch) | |
| tree | 8cf550386a152109df4ab6153d15e0d03829855c /arch/arm/boot/dts/imx6dl.dtsi | |
| parent | 827269318ca2d40ce316aef25ea82157c8bcf99c (diff) | |
ARM: dts: imx6dl: add a pinctrl for eCSPI1
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6dl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 24544ed93d8a..4b134542c000 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -35,6 +35,16 @@ compatible = "fsl,imx6dl-iomuxc"; reg = <0x020e0000 0x4000>; + ecspi1 { + pinctrl_ecspi1_1: ecspi1grp-1 { + fsl,pins = < + MX6DL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6DL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6DL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + >; + }; + }; + enet { pinctrl_enet_1: enetgrp-1 { fsl,pins = < |