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authorHui Wang <jason77.wang@gmail.com>2012-06-20 14:41:50 +0800
committerShawn Guo <shawn.guo@linaro.org>2012-07-12 14:59:11 +0800
commit8ad7a3058791d92de98cfb57eb799d37e9d30413 (patch)
tree1101029b2d12d85aaa99e7e24a2892191dab485e /arch/arm/boot/dts/imx6q-sabrelite.dts
parent74bd88f78f5ac7f30e0ff75e41b0daeec8d4d3bc (diff)
ARM: dts: imx6q-sabrelite: add ecspi1 pinctrl support
Imx6q sabrelite board uses ecspi1 to connect a spi flash sst25vf016b, we need to add pinctrl information for it in the dts, otherwise the ecspi1 driver can't work and the connected flash is wrongly detected as a mr25h256 flash like this: m25p80 spi32766.0: found mr25h256, expected sst25vf016b m25p80 spi32766.0: mr25h256 (32 Kbytes) Cc: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Hui Wang <jason77.wang@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6q-sabrelite.dts')
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 46fdfd1d5cd1..d42e851ceb97 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -27,6 +27,8 @@
ecspi@02008000 { /* eCSPI1 */
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi1_1>;
status = "okay";
flash: m25p80@0 {
@@ -50,6 +52,7 @@
pinctrl_gpio_hog: gpiohog {
fsl,pins = <
144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
+ 121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
>;
};
};