diff options
author | Shawn Xiao <b49994@freescale.com> | 2015-10-19 11:54:21 +0800 |
---|---|---|
committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 11:02:11 -0600 |
commit | f86a3b3e4aa20819cbe4e2941b2809e2be0f0420 (patch) | |
tree | 064a6d89045342b2c9e2233752436976445bc4e1 /arch/arm/boot/dts/imx6q.dtsi | |
parent | 2657704f8580f9ce1b068e78f5c5e41213273bbb (diff) |
MGS-1087 gpu: Move the GPU reserved memory to DTS file
Currently 128M reserved for GPU in all the i.MX6 boards that is
requiring kernel to allocate CMA 320M. For the low end devices like 6SX
and 6SL, the 320M is huge. Sometimes customer board may have very less
RAM.
With Kernel 4.1, there is a new feature CMA can be calculated at DTS
level based on the amount queried from different module drivers.So
moving the GPU memory to DTS is valid and can be configured for each
board.
And at the same time, also keep the option for user to configure the
parameters "contiguousBase and contiguousSize" in u-boot.
Signed-off-by: Shawn Xiao <b49994@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index d14f759c639f..2d7f2819c603 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -82,6 +82,20 @@ }; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x14000000>; + linux,cma-default; + }; + }; + soc { busfreq { compatible = "fsl,imx_busfreq"; @@ -93,12 +107,15 @@ interrupt-names = "irq_busfreq_0", "irq_busfreq_1", "irq_busfreq_2", "irq_busfreq_3"; fsl,max_ddr_freq = <528000000>; }; + gpu@00130000 { compatible = "fsl,imx6q-gpu"; reg = <0x00130000 0x4000>, <0x00134000 0x4000>, - <0x02204000 0x4000>, <0x0 0x0>; + <0x02204000 0x4000>, <0x0 0x0>, + <0x0 0x8000000>; reg-names = "iobase_3d", "iobase_2d", - "iobase_vg", "phys_baseaddr"; + "iobase_vg", "phys_baseaddr", + "contiguous_mem"; interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>, <0 10 IRQ_TYPE_LEVEL_HIGH>, <0 11 IRQ_TYPE_LEVEL_HIGH>; |