diff options
| author | Anson Huang <b20788@freescale.com> | 2013-12-16 16:07:37 -0500 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:16:15 -0600 |
| commit | 2a65d60b1387fbfab135e47174557d006f23266c (patch) | |
| tree | 28e4a76d0255984a21002eca86bcdf573d7331d8 /arch/arm/boot/dts/imx6q.dtsi | |
| parent | 25f4d068620730fe75691dae2bece33dbeb70890 (diff) | |
ARM: dts: imx6q: update setting of VDDARM_CAP voltage
According to datasheet, VDD_CACHE_CAP must not exceed VDDARM_CAP
by more than 200mV, as all of i.MX6Q boards' VDD_CACHE_CAP currently
are connected to VDDSOC_CAP, so we need to follow this rule by
increasing VDDARM_CAP's voltage.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
[shawn.guo: cherry-pick commit 26ea58019eda from upstream]
Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index f024ef28b34b..0127d8e46443 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -26,7 +26,7 @@ 1200000 1275000 996000 1250000 792000 1150000 - 396000 950000 + 396000 975000 >; clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clks 104>, <&clks 6>, <&clks 16>, |