diff options
| author | Haibo Chen <haibo.chen@freescale.com> | 2014-09-26 09:11:41 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:18:04 -0600 |
| commit | df5309e6f6709f2bb8a5c0979fc46def214f9465 (patch) | |
| tree | 900256dd724e760394ff42f17bfc91e39c916b9f /arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | |
| parent | 026e9c0591af05d8953de8074d7f0c19774f408b (diff) | |
ENGR00279946 dts: imx6qdl-sabreauto: add baseboard sd card slot support
NOTE since SD Card in main board takes a long route hence with
Drive Speed High 80 OHMS causing error on high speed cards.
Per suggestion DSE 40 OHMS is used.
And the SD1 on sabreauto baseboard is conflict with gpmi nand.
The conflict pins are DAT4~DAT7. Since the SD3 on cpu board
already supports 8 bit bus width, we do not want add an extra
dts file for it, so we disable 8 bit and use 4 bit width for
this issue.
[haibo chen:
cherry-pick commit e38226f4cbf222ce9377963e20fe5f1d7103a2af
cherry-pick commit 3807ed7ac39ec402f19bb27d2d60ceb3ce5448b2
from imx_3.10.y]
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabreauto.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index 10b4a10e6a09..4210fcbb19dc 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -448,6 +448,8 @@ MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x80000000 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x80000000 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 + MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x17059 + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x17059 >; }; @@ -605,6 +607,17 @@ >; }; + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 + >; + }; + pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 @@ -748,6 +761,17 @@ status = "okay"; }; +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio1 1 0>; + wp-gpios = <&gpio5 20 0>; + no-1-8-v; + keep-power-in-suspend; + enable-sdio-wakeup; + status = "okay"; +}; + &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; |