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author | Anson Huang <b20788@freescale.com> | 2014-09-17 11:11:46 +0800 |
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committer | Nitin Garg <nitin.garg@freescale.com> | 2015-09-17 09:20:06 -0500 |
commit | ab0063b430a29445deda6579d3e139e77f9465ad (patch) | |
tree | 6809de92d542b84f8e9845f10b409a85cca4168c /arch/arm/boot/dts/imx6qdl-sabresd.dtsi | |
parent | e85d8ee750da9bcedc9ad93fea5a9b72c912f825 (diff) |
ARM: imx: add anatop settings for LPDDR2 when enter DSM mode
For LPDDR2 platform, no need to enable weak2P5 in DSM mode,
it can be pulled down to save power(~0.65mW).
And per design team's recommendation, we should disconnect
VDDHIGH and SNVS in DSM mode on i.MX6SL.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabresd.dtsi')
0 files changed, 0 insertions, 0 deletions