diff options
| author | Shawn Guo <shawn.guo@freescale.com> | 2014-06-15 11:55:24 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:16:28 -0600 |
| commit | 35d31a5dbcc65a2ce5f8d70ac410aca385ac5fb9 (patch) | |
| tree | b77f2ba87c8ce8888b9b29b029efc48f048f8e87 /arch/arm/boot/dts/imx6qdl.dtsi | |
| parent | d9fe90f04e01dde925836990c2ff864f7dbf4acb (diff) | |
ENGR00317981: ARM: dts: imx6qdl: add LDB and LCD for imx6qdl-sabresd
It's a device tree source porting from imx_3.10.y regarding to LDB and
LCD support on imx6qdl-sabresd board.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index cf32e1cd0e88..9b93740862fc 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -26,6 +26,7 @@ i2c0 = &i2c1; i2c1 = &i2c2; i2c2 = &i2c3; + ipu0 = &ipu1; serial0 = &uart1; serial1 = &uart2; serial2 = &uart3; @@ -657,7 +658,6 @@ ldb: ldb@020e0008 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb"; gpr = <&gpr>; status = "disabled"; @@ -958,16 +958,20 @@ }; ipu1: ipu@02400000 { - #crtc-cells = <1>; compatible = "fsl,imx6q-ipu"; reg = <0x02400000 0x400000>; interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>, <0 5 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_IPU1>, - <&clks IMX6QDL_CLK_IPU1_DI0>, - <&clks IMX6QDL_CLK_IPU1_DI1>; - clock-names = "bus", "di0", "di1"; + <&clks IMX6QDL_CLK_IPU1_DI0>, <&clks IMX6QDL_CLK_IPU1_DI1>, + <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>, + <&clks IMX6QDL_CLK_LDB_DI0>, <&clks IMX6QDL_CLK_LDB_DI0>; + clock-names = "bus", + "di0", "di1", + "di0_sel", "di1_sel", + "ldb_di0", "ldb_di1"; resets = <&src 2>; + bypass_reset = <0>; }; }; }; |