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authorRobby Cai <r63905@freescale.com>2015-02-28 18:48:21 +0800
committerRobby Cai <r63905@freescale.com>2015-03-02 15:58:02 +0800
commit9dd1ed06c9160e283dd1bf852ed8dd2368ab33b0 (patch)
tree1c12e7a5f111b05b47cc9014779fa8d85a564ec2 /arch/arm/boot/dts/imx6qdl.dtsi
parent8af72e14692cfa735f65368c74496acb988d30bb (diff)
MLK-10349 ARM: dts: imx6dql: fix the clock for MIPI CSI2
Fix the clock index for cfg clock and use MACRO instead of hard-codes. This patch fixes the following issue. ----------------------------------------------------------- root@imx6qdlsolo:~# /unit_tests/mxc_v4l2_capture.out -d /dev/video1 1.yuv in_width = 176, in_height = 144 out_width = 176, out_height = 144 top = 0, left = 0 mipi csi2 can not receive sensor clk! ... ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0 VIDIOC_DQBUF failed.ERROR: v4l2 capture: VIDIOC_QBUF: buffer already queued ----------------------------------------------------------- Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit 6e4ee449de591d3cfb93575ca639ca32944832bc)
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index ab73d832c268..732f2d247a7f 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -1095,7 +1095,9 @@
compatible = "fsl,imx6q-mipi-csi2";
reg = <0x021dc000 0x4000>;
interrupts = <0 100 0x04>, <0 101 0x04>;
- clocks = <&clks 138>, <&clks 53>, <&clks 204>;
+ clocks = <&clks IMX6QDL_CLK_HSI_TX>,
+ <&clks IMX6QDL_CLK_EMI_SEL>,
+ <&clks IMX6QDL_CLK_VIDEO_27M>;
/* Note: clks 138 is hsi_tx, however, the dphy_c
* hsi_tx and pll_refclk use the same clk gate.
* In current clk driver, open/close clk gate do