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authorPeng Fan <Peng.Fan@freescale.com>2014-09-26 17:15:14 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-09-17 08:59:42 -0500
commit35375f61f9fdf7faf0f6a4febaed593a6c639aa3 (patch)
tree407fd46e845c8a2fd095aa1b0aea36dd6fbb7d2c /arch/arm/boot/dts/imx6sl.dtsi
parentcd20e1cc475556ee02a9ffd04cd9ec7d94097aea (diff)
MLK-9644 imx6:dtb: reserve 16KB for IRAM TLB
Reserve 16KB for IRAM TLB. Except mx6sx, all others use 0x900000 as the IRAM TLB base addr. To mx6sx, 0x8f8000 is used for IRAM TLB base addr. Actually, 16KB is reserved for IRAM TLB, but only upper 8KB is used for kernel TLB, the lower 8KB is used for pm_info and OCRAM code. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ping Bai <Ping.Bai@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi10
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index c8b5bbae589d..46a8fa846281 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -101,9 +101,15 @@
interrupt-parent = <&intc>;
ranges;
- ocram: sram@00900000 {
+ ocrams: sram@00900000 {
+ compatible = "fsl,lpm-sram";
+ reg = <0x00900000 0x4000>;
+ clocks = <&clks IMX6SL_CLK_OCRAM>;
+ };
+
+ ocram: sram@00904000 {
compatible = "mmio-sram";
- reg = <0x00900000 0x20000>;
+ reg = <0x00904000 0x1C000>;
clocks = <&clks IMX6SL_CLK_OCRAM>;
};