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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-11 17:34:56 +0900
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-11 17:34:56 +0900
commitf9efbce6334844c7f8b9b9459f6d7a6fbc2928e0 (patch)
tree4490a75f7058885561ab498b68fa68e32cf5b969 /arch/arm/boot/dts/imx6sl.dtsi
parent53575aa99dc1584484b99c8173042d8370f6ed88 (diff)
parent07eb663b7ec7fdb9c325e22e83f5975c724b6249 (diff)
Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC DT updates from Olof Johansson: "Most of this branch consists of updates, additions and general churn of the device tree source files in the kernel (arch/arm/boot/dts). Besides that, there are a few things to point out: - Lots of platform conversion on OMAP2+, with removal of old board files for various platforms. - Final conversion of a bunch of ux500 (ST-Ericsson) platforms as well - Some updates to pinctrl and other subsystems. Most of these are for DT-enablement of the various platforms and acks have been collected" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (385 commits) ARM: dts: bcm11351: Use GIC/IRQ defines for sdio interrupts ARM: dts: bcm: Add missing UARTs for bcm11351 (bcm281xx) ARM: dts: bcm281xx: Add card detect GPIO ARM: dts: rename ARCH_BCM to ARCH_BCM_MOBILE (dt) ARM: bcm281xx: Add device node for the GPIO controller ARM: mvebu: Add Netgear ReadyNAS 104 board ARM: tegra: fix Tegra114 IOMMU register address ARM: kirkwood: add support for OpenBlocks A7 platform ARM: dts: omap4-panda: add DPI pinmuxing ARM: dts: AM33xx: Add RNG node ARM: dts: AM33XX: Add hwspinlock node ARM: dts: OMAP5: Add hwspinlock node ARM: dts: OMAP4: Add hwspinlock node ARM: dts: use 'status' property for PCIe nodes ARM: dts: sirf: add missed address-cells and size-cells for prima2 I2C ARM: dts: sirf: add missed cell, cs and dma channel for SPI nodes ARM: dts: sirf: add missed graphics2d iobg in atlas6 dts ARM: dts: sirf: add missed chhifbg node in prima2 and atlas6 dts ARM: dts: sirf: add missed memcontrol-monitor node in prima2 and atlas6 dts ARM: mvebu: Add the core-divider clock to Armada 370/XP ...
Diffstat (limited to 'arch/arm/boot/dts/imx6sl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi172
1 files changed, 164 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 177d9e791a01..28558f1aaf2d 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -13,16 +13,20 @@
/ {
aliases {
- serial0 = &uart1;
- serial1 = &uart2;
- serial2 = &uart3;
- serial3 = &uart4;
- serial4 = &uart5;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
+ serial0 = &uart1;
+ serial1 = &uart2;
+ serial2 = &uart3;
+ serial3 = &uart4;
+ serial4 = &uart5;
+ spi0 = &ecspi1;
+ spi1 = &ecspi2;
+ spi2 = &ecspi3;
+ spi3 = &ecspi4;
};
cpus {
@@ -530,10 +534,26 @@
interrupts = <0 89 0x04>;
};
+ gpr: iomuxc-gpr@020e0000 {
+ compatible = "fsl,imx6sl-iomuxc-gpr",
+ "fsl,imx6q-iomuxc-gpr", "syscon";
+ reg = <0x020e0000 0x38>;
+ };
+
iomuxc: iomuxc@020e0000 {
compatible = "fsl,imx6sl-iomuxc";
reg = <0x020e0000 0x4000>;
+ ecspi1 {
+ pinctrl_ecspi1_1: ecspi1grp-1 {
+ fsl,pins = <
+ MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
+ MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
+ MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
+ >;
+ };
+ };
+
fec {
pinctrl_fec_1: fecgrp-1 {
fsl,pins = <
@@ -559,6 +579,64 @@
};
};
+ usbotg1 {
+ pinctrl_usbotg1_1: usbotg1grp-1 {
+ fsl,pins = <
+ MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
+ >;
+ };
+
+ pinctrl_usbotg1_2: usbotg1grp-2 {
+ fsl,pins = <
+ MX6SL_PAD_FEC_RXD0__USB_OTG1_ID 0x17059
+ >;
+ };
+
+ pinctrl_usbotg1_3: usbotg1grp-3 {
+ fsl,pins = <
+ MX6SL_PAD_LCD_DAT1__USB_OTG1_ID 0x17059
+ >;
+ };
+
+ pinctrl_usbotg1_4: usbotg1grp-4 {
+ fsl,pins = <
+ MX6SL_PAD_REF_CLK_32K__USB_OTG1_ID 0x17059
+ >;
+ };
+
+ pinctrl_usbotg1_5: usbotg1grp-5 {
+ fsl,pins = <
+ MX6SL_PAD_SD3_DAT0__USB_OTG1_ID 0x17059
+ >;
+ };
+ };
+
+ usbotg2 {
+ pinctrl_usbotg2_1: usbotg2grp-1 {
+ fsl,pins = <
+ MX6SL_PAD_ECSPI1_SCLK__USB_OTG2_OC 0x17059
+ >;
+ };
+
+ pinctrl_usbotg2_2: usbotg2grp-2 {
+ fsl,pins = <
+ MX6SL_PAD_ECSPI2_SCLK__USB_OTG2_OC 0x17059
+ >;
+ };
+
+ pinctrl_usbotg2_3: usbotg2grp-3 {
+ fsl,pins = <
+ MX6SL_PAD_KEY_ROW5__USB_OTG2_OC 0x17059
+ >;
+ };
+
+ pinctrl_usbotg2_4: usbotg2grp-4 {
+ fsl,pins = <
+ MX6SL_PAD_SD3_DAT2__USB_OTG2_OC 0x17059
+ >;
+ };
+ };
+
usdhc1 {
pinctrl_usdhc1_1: usdhc1grp-1 {
fsl,pins = <
@@ -574,6 +652,38 @@
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
>;
};
+
+ pinctrl_usdhc1_1_100mhz: usdhc1grp-1-100mhz {
+ fsl,pins = <
+ MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
+ MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
+ MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
+ MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
+ MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
+ MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
+ MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
+ MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
+ MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
+ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc1_1_200mhz: usdhc1grp-1-200mhz {
+ fsl,pins = <
+ MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
+ MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
+ MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
+ MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
+ MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
+ MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
+ MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
+ MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
+ MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
+ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
+ >;
+ };
+
+
};
usdhc2 {
@@ -587,6 +697,29 @@
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>;
};
+
+ pinctrl_usdhc2_1_100mhz: usdhc2grp-1-100mhz {
+ fsl,pins = <
+ MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
+ MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
+ MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
+ MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
+ MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
+ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc2_1_200mhz: usdhc2grp-1-200mhz {
+ fsl,pins = <
+ MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
+ MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
+ MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
+ MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
+ MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
+ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
+ >;
+ };
+
};
usdhc3 {
@@ -600,6 +733,28 @@
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>;
};
+
+ pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz {
+ fsl,pins = <
+ MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
+ MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
+ MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
+ MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
+ MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
+ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz {
+ fsl,pins = <
+ MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
+ MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
+ MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
+ MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
+ MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
+ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
+ >;
+ };
};
};
@@ -621,7 +776,8 @@
<&clks IMX6SL_CLK_SDMA>;
clock-names = "ipg", "ahb";
#dma-cells = <3>;
- fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6sl.bin";
+ /* imx6sl reuses imx6q sdma firmware */
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
};
pxp: pxp@020f0000 {
@@ -665,7 +821,7 @@
usbotg2: usb@02184200 {
compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
reg = <0x02184200 0x200>;
- interrupts = <0 40 0x04>;
+ interrupts = <0 42 0x04>;
clocks = <&clks IMX6SL_CLK_USBOH3>;
fsl,usbphy = <&usbphy2>;
fsl,usbmisc = <&usbmisc 1>;
@@ -675,7 +831,7 @@
usbh: usb@02184400 {
compatible = "fsl,imx6sl-usb", "fsl,imx27-usb";
reg = <0x02184400 0x200>;
- interrupts = <0 42 0x04>;
+ interrupts = <0 40 0x04>;
clocks = <&clks IMX6SL_CLK_USBOH3>;
fsl,usbmisc = <&usbmisc 2>;
status = "disabled";