diff options
| author | Anson Huang <b20788@freescale.com> | 2014-10-09 15:00:20 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:18:21 -0600 |
| commit | 9b65306e8f3a38b5af575db7b1825b041528b258 (patch) | |
| tree | 22cadd15abca9dabfd8cd46a67549cb1434141d6 /arch/arm/boot/dts/imx6sx.dtsi | |
| parent | 519eeb6b5b240d1e6af34e3a2f3e21237f7387cc (diff) | |
MLK-9669-4 arm: dts: imx6: enable busfreq
enable busfreq driver for i.MX6Q/DL/SX.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 29 |
1 files changed, 27 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 2f5d18e21ec3..97bfdfa3c15b 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -134,6 +134,25 @@ interrupt-parent = <&intc>; ranges; + busfreq { + compatible = "fsl,imx6_busfreq"; + clocks = <&clks IMX6SX_CLK_PLL2_BUS>, <&clks IMX6SX_CLK_PLL2_PFD2>, + <&clks IMX6SX_CLK_PLL2_198M>, <&clks IMX6SX_CLK_ARM>, + <&clks IMX6SX_CLK_PLL3_USB_OTG>, <&clks IMX6SX_CLK_PERIPH>, + <&clks IMX6SX_CLK_PERIPH_PRE>, <&clks IMX6SX_CLK_PERIPH_CLK2>, + <&clks IMX6SX_CLK_PERIPH_CLK2_SEL>, <&clks IMX6SX_CLK_OSC>, + <&clks IMX6SX_CLK_PLL1_SYS>, <&clks IMX6SX_CLK_PERIPH2>, + <&clks IMX6SX_CLK_AHB>, <&clks IMX6SX_CLK_OCRAM>, + <&clks IMX6SX_CLK_PLL1_SW>, <&clks IMX6SX_CLK_PERIPH2_PRE>, + <&clks IMX6SX_CLK_PERIPH2_CLK2_SEL>, <&clks IMX6SX_CLK_PERIPH2_CLK2>, + <&clks IMX6SX_CLK_STEP>, <&clks IMX6SX_CLK_MMDC_P0_FAST>, + <&clks IMX6SX_CLK_M4>; + clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph", + "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "pll1_sys", "periph2", "ahb", "ocram", "pll1_sw", + "periph2_pre", "periph2_clk2_sel", "periph2_clk2", "step", "mmdc", "m4"; + fsl,max_ddr_freq = <400000000>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; @@ -145,9 +164,15 @@ clocks = <&clks IMX6SX_CLK_OCRAM_S>; }; - ocram: sram@00900000 { + ocrams_ddr: sram@00900000 { + compatible = "fsl,ddr-lpm-sram"; + reg = <0x00900000 0x1000>; + clocks = <&clks IMX6SX_CLK_OCRAM>; + }; + + ocram: sram@00901000 { compatible = "mmio-sram"; - reg = <0x00900000 0x20000>; + reg = <0x00901000 0x1F000>; clocks = <&clks IMX6SX_CLK_OCRAM>; }; |