diff options
author | Bai Ping <ping.bai@nxp.com> | 2017-01-20 17:41:25 +0800 |
---|---|---|
committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
commit | 2d1d842cd44d7a196787b4639cb2c37665da458e (patch) | |
tree | 82fa1eda1502fb879706f16e6ad14da6b45d2588 /arch/arm/boot/dts/imx6ul.dtsi | |
parent | d5dce0bf9fad297b8219ca1eeac379a66c693fdf (diff) |
MLK-13801-02 ARM: dts: Correct the gpt timer clock source on imx6ul/ull/sll
The GPT timer counter clock should be sourced from GPT_3M clock to avoid
counter clock frequency changed due to system bus clock changes.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6ul.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 2f8a934ef693..1b8902d997d5 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -1,5 +1,6 @@ /* * Copyright 2015-2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -514,8 +515,8 @@ reg = <0x02098000 0x4000>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_GPT1_BUS>, - <&clks IMX6UL_CLK_GPT1_SERIAL>; - clock-names = "ipg", "per"; + <&clks IMX6UL_CLK_GPT_3M>; + clock-names = "ipg", "osc_per"; }; gpio1: gpio@0209c000 { |