diff options
| author | Yangbo Lu <yangbo.lu@nxp.com> | 2017-11-29 14:54:58 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2017-12-26 16:15:44 +0800 |
| commit | bdba5017d149ef3cfcd47adf98837da7680817c7 (patch) | |
| tree | 088c2234099676e8417b2b790f26de9bb677bcb2 /arch/arm/boot/dts/ls1021a.dtsi | |
| parent | 44eac6ef3779f8c1eaa223892fe25ae62f263965 (diff) | |
ARM: dts: ls1021a: fix the value of TMR_FIPER1
The timer fixed interval period pulse generator register
is used to generate periodic pulses. The down count
register loads the value programmed in the fixed period
interval (FIPER). At every tick of the timer accumulator
overflow, the counter decrements by the value of
TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down
counter value reaches zero. It reloads the down counter
in the cycle following a pulse. To use the TMR_FIPER1
register to generate a 1 PPS event, the value
(10^9 nanoseconds) - TCLK_PERIOD should be programmed.
It should be 999999995 not 999999990 since TCLK_PERIOD
is 5.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/ls1021a.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/ls1021a.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 64249726b3cb..a861a4b9e319 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -589,7 +589,7 @@ fsl,tclk-period = <5>; fsl,tmr-prsc = <2>; fsl,tmr-add = <0xaaaaaaab>; - fsl,tmr-fiper1 = <999999990>; + fsl,tmr-fiper1 = <999999995>; fsl,tmr-fiper2 = <99990>; fsl,max-adj = <499999999>; }; |