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authorStephen Boyd <sboyd@codeaurora.org>2012-09-05 12:28:54 -0700
committerDavid Brown <davidb@codeaurora.org>2012-09-13 11:14:54 -0700
commit8407116075eca1d8d22a466759c3d38678b9dd12 (patch)
treea9d52c38721cab4091a40182153044c7be096bff /arch/arm/boot/dts/msm8660-surf.dts
parent6e3321631ac2eca99b3289b83ea1f290b1a8bd92 (diff)
ARM: msm: Move 8660 to DT timer
Add the timer entry and point the machine descriptor to the device tree based msm timer. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [davidb@codeaurora.org: Remove leading zeros] Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/boot/dts/msm8660-surf.dts')
-rw-r--r--arch/arm/boot/dts/msm8660-surf.dts19
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
index 45bc4bb04e57..31f2157cd7d7 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -7,7 +7,7 @@
compatible = "qcom,msm8660-surf", "qcom,msm8660";
interrupt-parent = <&intc>;
- intc: interrupt-controller@02080000 {
+ intc: interrupt-controller@2080000 {
compatible = "qcom,msm-8660-qgic";
interrupt-controller;
#interrupt-cells = <3>;
@@ -15,6 +15,23 @@
< 0x02081000 0x1000 >;
};
+ timer@2000004 {
+ compatible = "qcom,msm-gpt", "qcom,msm-timer";
+ interrupts = <1 1 0x301>;
+ reg = <0x02000004 0x10>;
+ clock-frequency = <32768>;
+ cpu-offset = <0x40000>;
+ };
+
+ timer@2000024 {
+ compatible = "qcom,msm-dgt", "qcom,msm-timer";
+ interrupts = <1 0 0x301>;
+ reg = <0x02000024 0x10>,
+ <0x02000034 0x4>;
+ clock-frequency = <6750000>;
+ cpu-offset = <0x40000>;
+ };
+
serial@19c400000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x19c40000 0x1000>,