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authorTomi Valkeinen <tomi.valkeinen@ti.com>2013-03-19 11:38:13 +0200
committerTomi Valkeinen <tomi.valkeinen@ti.com>2014-03-19 09:31:49 +0200
commitb8a7e42b686a3b101818c5b5e0eaf70521324367 (patch)
tree32dd5df2a43e6cf782d0d853273aa1265ef9afeb /arch/arm/boot/dts/omap3.dtsi
parent0f3b1e4415be85ba35a32d371cd05df44ba522e0 (diff)
ARM: omap3.dtsi: add omapdss information
Add DT data for OMAP3 display subsystem, which contains the following blocks: dss - the wrapper/glue for the display modules dispc - display controller dsi - MIPI DSI encoder rfbi - MIPI DBI encoder venc - analog TV encoder Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3.dtsi')
-rw-r--r--arch/arm/boot/dts/omap3.dtsi52
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index a089e6e00457..3d05eff67e25 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -688,6 +688,58 @@
num-eps = <16>;
ram-bits = <12>;
};
+
+ dss: dss@48050000 {
+ compatible = "ti,omap3-dss";
+ reg = <0x48050000 0x200>;
+ status = "disabled";
+ ti,hwmods = "dss_core";
+ clocks = <&dss1_alwon_fck>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dispc@48050400 {
+ compatible = "ti,omap3-dispc";
+ reg = <0x48050400 0x400>;
+ interrupts = <25>;
+ ti,hwmods = "dss_dispc";
+ clocks = <&dss1_alwon_fck>;
+ clock-names = "fck";
+ };
+
+ dsi: encoder@4804fc00 {
+ compatible = "ti,omap3-dsi";
+ reg = <0x4804fc00 0x200>,
+ <0x4804fe00 0x40>,
+ <0x4804ff00 0x20>;
+ reg-names = "proto", "phy", "pll";
+ interrupts = <25>;
+ status = "disabled";
+ ti,hwmods = "dss_dsi1";
+ clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
+ clock-names = "fck", "sys_clk";
+ };
+
+ rfbi: encoder@48050800 {
+ compatible = "ti,omap3-rfbi";
+ reg = <0x48050800 0x100>;
+ status = "disabled";
+ ti,hwmods = "dss_rfbi";
+ clocks = <&dss1_alwon_fck>, <&dss_ick>;
+ clock-names = "fck", "ick";
+ };
+
+ venc: encoder@48050c00 {
+ compatible = "ti,omap3-venc";
+ reg = <0x48050c00 0x100>;
+ status = "disabled";
+ ti,hwmods = "dss_venc";
+ clocks = <&dss_tv_fck>;
+ clock-names = "fck";
+ };
+ };
};
};