summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/qcom-msm8660-surf.dts
diff options
context:
space:
mode:
authorKumar Gala <galak@codeaurora.org>2013-09-17 10:51:43 -0500
committerDavid Brown <davidb@codeaurora.org>2013-09-25 13:02:56 -0700
commit81cf1e061d001fab44dbaa85fc4fbfb6da6713a1 (patch)
treed463aa5a08d08d5825e8ba9d3682e99117652140 /arch/arm/boot/dts/qcom-msm8660-surf.dts
parentd0e190c37a85f1a8b7dccada8b2fb8fa64c36635 (diff)
ARM: msm: Rename msm devicetrees to have standard 'qcom' prefix
Use a standard 'qcom' prefix to denotate device trees meant for Qualcomm based processors. Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8660-surf.dts')
-rw-r--r--arch/arm/boot/dts/qcom-msm8660-surf.dts52
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts
new file mode 100644
index 000000000000..386d42870215
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts
@@ -0,0 +1,52 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "Qualcomm MSM8660 SURF";
+ compatible = "qcom,msm8660-surf", "qcom,msm8660";
+ interrupt-parent = <&intc>;
+
+ intc: interrupt-controller@2080000 {
+ compatible = "qcom,msm-8660-qgic";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = < 0x02080000 0x1000 >,
+ < 0x02081000 0x1000 >;
+ };
+
+ timer@2000000 {
+ compatible = "qcom,scss-timer", "qcom,msm-timer";
+ interrupts = <1 0 0x301>,
+ <1 1 0x301>,
+ <1 2 0x301>;
+ reg = <0x02000000 0x100>;
+ clock-frequency = <27000000>,
+ <32768>;
+ cpu-offset = <0x40000>;
+ };
+
+ msmgpio: gpio@800000 {
+ compatible = "qcom,msm-gpio";
+ reg = <0x00800000 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpio = <173>;
+ interrupts = <0 32 0x4>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ serial@19c40000 {
+ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+ reg = <0x19c40000 0x1000>,
+ <0x19c00000 0x1000>;
+ interrupts = <0 195 0x0>;
+ };
+
+ qcom,ssbi@500000 {
+ compatible = "qcom,ssbi";
+ reg = <0x500000 0x1000>;
+ qcom,controller-type = "pmic-arbiter";
+ };
+};