diff options
| author | Simon Horman <horms+renesas@verge.net.au> | 2013-12-26 14:15:47 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2013-12-26 14:15:47 +0900 |
| commit | 4d0810257a7f1d040526a6dc5bde5a4737994a7e (patch) | |
| tree | c156a60e847a2a83d52bb6d0c5d223eb7f939da4 /arch/arm/boot/dts/r8a7790.dtsi | |
| parent | b652896b02df3dfde3a68957cce01f2aa4585842 (diff) | |
Revert "ARM: shmobile: r8a7790: Add SSI clocks in device tree"
This reverts commit 6dea2c1ebc6fc43852fd6125d75a75da223ff707.
Unfortunately this commit prevents multiplatform from booting to
the point where a serial console is available. Revert it while
a solution is sought.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7790.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7790.dtsi | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index c5417dafca0d..a1791250bf4b 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -626,25 +626,5 @@ clock-output-names = "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0"; }; - mstp10_clks: mstp10_clks@e6150998 { - compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; - reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; - clocks = <&p_clk>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>; - #clock-cells = <1>; - renesas,clock-indices = < - R8A7790_CLK_SSI R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 - R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5 - R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 - R8A7790_CLK_SSI1 R8A7790_CLK_SSI0 - >; - clock-output-names = - "ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", - "ssi4", "ssi3", "ssi2", "ssi1", "ssi0"; - }; }; }; |