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authorSimon Horman <horms+renesas@verge.net.au>2013-12-26 14:16:54 +0900
committerSimon Horman <horms+renesas@verge.net.au>2013-12-26 14:16:54 +0900
commit3effae8c26f451a9d572255c08dfbe342dd1dc98 (patch)
tree5d0f66fa84926178535ba58a1318588376fe970b /arch/arm/boot/dts/r8a7791.dtsi
parent4d0810257a7f1d040526a6dc5bde5a4737994a7e (diff)
Revert "ARM: shmobile: r8a7791: Add SSI clocks in device tree"
This reverts commit b652896b02df3dfde3a68957cce01f2aa4585842. Unfortunately this commit prevents multiplatform from booting to the point where a serial console is available. Revert it while a solution is sought. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7791.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi20
1 files changed, 0 insertions, 20 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index e92c1f7aedd0..19c65509a22d 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -495,26 +495,6 @@
"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
"i2c2", "i2c1", "i2c0";
};
- mstp10_clks: mstp10_clks@e6150998 {
- compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
- reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
- clocks = <&p_clk>, <&mstp10_clks R8A7791_CLK_SSI>,
- <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
- <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
- <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
- <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
- <&mstp10_clks R8A7791_CLK_SSI>;
- #clock-cells = <1>;
- renesas,clock-indices = <
- R8A7791_CLK_SSI R8A7791_CLK_SSI9 R8A7791_CLK_SSI8
- R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5
- R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2
- R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
- >;
- clock-output-names =
- "ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
- "ssi4", "ssi3", "ssi2", "ssi1", "ssi0";
- };
mstp11_clks: mstp11_clks@e615099c {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;