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authorSimon Horman <horms+renesas@verge.net.au>2015-11-12 10:29:22 +0900
committerSimon Horman <horms+renesas@verge.net.au>2015-11-13 10:10:19 +0900
commit469352ad3c43e689c15cd396cbb750ee831ab63e (patch)
treec5e2b16e5f6d1e88a32a9a447b17de980396c3ba /arch/arm/boot/dts/r8a7793.dtsi
parent38eb6a3aaf08cc8a70ef3d6a767521e2831a8a4c (diff)
ARM: shmobile: r8a7793: Add QSPI device to DT
Instantiate the QSPI controller in the r8a7793 device tree. Based on similar work for the r8a7794 by Hisashi Nakamura and Sergei Shtylyov. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7793.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7793.dtsi26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 187a82dc7d9f..aa9b64c14a09 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -18,6 +18,10 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ spi0 = &qspi;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -222,6 +226,20 @@
status = "disabled";
};
+ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7793", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>;
+ dma-names = "tx", "rx";
+ power-domains = <&cpg_clocks>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
clocks {
#address-cells = <2>;
#size-cells = <2>;
@@ -463,6 +481,14 @@
"ipmmu_sgx", "vin2", "vin1", "vin0", "ether",
"sata1", "sata0";
};
+ mstp9_clks: mstp9_clks@e6150994 {
+ compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+ clocks = <&cpg_clocks R8A7793_CLK_QSPI>;
+ #clock-cells = <1>;
+ clock-indices = <R8A7793_CLK_QSPI_MOD>;
+ clock-output-names = "qspi_mod";
+ };
};
ipmmu_sy0: mmu@e6280000 {