diff options
| author | Heiko Stuebner <heiko@sntech.de> | 2014-09-13 00:34:29 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2014-10-20 11:52:24 +0200 |
| commit | be8a77c54815b311485a348547ec80803ee9415b (patch) | |
| tree | 772c123f75d053a75e81f35fe4c87b3b963cfe0d /arch/arm/boot/dts/rk3188.dtsi | |
| parent | f114040e3ea6e07372334ade75d1ee0775c355e1 (diff) | |
ARM: dts: rockchip: add operating points and armclk references
Add basic OPP entries for current supported Rockchip SoCs.
The operating points are currently very conservative, so individual
boards may opt to redefine them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/boot/dts/rk3188.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3188.dtsi | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index ddaada788b45..ae4f04984d86 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -26,11 +26,24 @@ #size-cells = <0>; enable-method = "rockchip,rk3066-smp"; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; next-level-cache = <&L2>; reg = <0x0>; + operating-points = < + /* kHz uV */ + 1608000 1350000 + 1416000 1250000 + 1200000 1150000 + 1008000 1075000 + 816000 975000 + 600000 950000 + 504000 925000 + 312000 875000 + >; + clock-latency = <40000>; + clocks = <&cru ARMCLK>; }; cpu@1 { device_type = "cpu"; |