diff options
author | Shiraz Hashim <shiraz.hashim@st.com> | 2012-08-03 16:00:18 +0530 |
---|---|---|
committer | Viresh Kumar <viresh.kumar@linaro.org> | 2012-11-26 16:55:32 +0530 |
commit | 86edd7b8ac2791ddf42ab082799ddb843813c3bc (patch) | |
tree | 4b39c92a300da2be438d7bcfd3ea6ee93e0a1e8d /arch/arm/boot/dts/spear320.dtsi | |
parent | 80515a5a2e3c35e2994105f19af27650e8a16c51 (diff) |
ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor
shirq layer has been adapted to DT, add corresponding nodes in all
SPEAr3xx variants.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/spear320.dtsi')
-rw-r--r-- | arch/arm/boot/dts/spear320.dtsi | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi index 6ff0d1e0e461..c056a84deabf 100644 --- a/arch/arm/boot/dts/spear320.dtsi +++ b/arch/arm/boot/dts/spear320.dtsi @@ -30,7 +30,8 @@ clcd@90000000 { compatible = "arm,pl110", "arm,primecell"; reg = <0x90000000 0x1000>; - interrupts = <33>; + interrupts = <8>; + interrupt-parent = <&shirq>; status = "disabled"; }; @@ -49,13 +50,24 @@ sdhci@70000000 { compatible = "st,sdhci-spear"; reg = <0x70000000 0x100>; - interrupts = <29>; + interrupts = <10>; + interrupt-parent = <&shirq>; status = "disabled"; }; + shirq: interrupt-controller@0xb3000000 { + compatible = "st,spear320-shirq"; + reg = <0xb3000000 0x1000>; + interrupts = <30 28 29 1>; + #interrupt-cells = <1>; + interrupt-controller; + }; + spi1: spi@a5000000 { compatible = "arm,pl022", "arm,primecell"; reg = <0xa5000000 0x1000>; + interrupts = <15>; + interrupt-parent = <&shirq>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -64,6 +76,8 @@ spi2: spi@a6000000 { compatible = "arm,pl022", "arm,primecell"; reg = <0xa6000000 0x1000>; + interrupts = <16>; + interrupt-parent = <&shirq>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -88,18 +102,24 @@ #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xa7000000 0x1000>; + interrupts = <21>; + interrupt-parent = <&shirq>; status = "disabled"; }; serial@a3000000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xa3000000 0x1000>; + interrupts = <13>; + interrupt-parent = <&shirq>; status = "disabled"; }; serial@a4000000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xa4000000 0x1000>; + interrupts = <14>; + interrupt-parent = <&shirq>; status = "disabled"; }; |