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authorMaxime Coquelin <maxime.coquelin@st.com>2015-10-01 17:44:41 +0200
committerMaxime Coquelin <maxime.coquelin@st.com>2015-10-15 13:45:51 +0200
commitab511d7df1a0f73c4ccccd5655c84efdb7f816c1 (patch)
treebfb69bba3d5663a8b02c26a45430bd22993ef7f1 /arch/arm/boot/dts/stih407-family.dtsi
parentb89c429c1b4c176fee1912114ec7b2785949783b (diff)
ARM: dts: Add Ethernet node to STiH407 family
STiH407 family uses the Synopsys IP. Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih407-family.dtsi')
-rw-r--r--arch/arm/boot/dts/stih407-family.dtsi27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 582154bbe3f3..c944d3a5906d 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -653,5 +653,32 @@
clocks = <&clk_sysin>;
status = "okay";
};
+
+ ethernet0: dwmac@9630000 {
+ device_type = "network";
+ status = "disabled";
+ compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";
+ reg = <0x9630000 0x8000>, <0x80 0x4>;
+ reg-names = "stmmaceth", "sti-ethconf";
+
+ st,syscon = <&syscfg_sbc_reg 0x80>;
+ st,gmac_en;
+ resets = <&softreset STIH407_ETH1_SOFTRESET>;
+ reset-names = "stmmaceth";
+
+ interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>,
+ <GIC_SPI 99 IRQ_TYPE_NONE>;
+ interrupt-names = "macirq", "eth_wake_irq";
+
+ /* DMA Bus Mode */
+ snps,pbl = <8>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii1>;
+
+ clock-names = "stmmaceth", "sti-ethclk";
+ clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>,
+ <&clk_s_c0_flexgen CLK_ETH_PHY>;
+ };
};
};