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authorSrinivas Kandagatla <srinivas.kandagatla@st.com>2014-03-11 09:24:55 +0000
committerSrinivas Kandagatla <srinivas.kandagatla@st.com>2014-03-11 10:02:51 +0000
commit6b7f06cc805bb4755e69cd916b3f565947e0a77a (patch)
tree087a444745f1a096da308014bd2afc077a08f471 /arch/arm/boot/dts/stih415.dtsi
parent7ec5183a0ab1930b071c3c68a7d3b08e29b8bb78 (diff)
ARM: STi: STiH415: Add reset controller support.
This patch adds a reset controller node to the SOC device tree and also adds new header files with reset lines required for other device tree nodes. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih415.dtsi')
-rw-r--r--arch/arm/boot/dts/stih415.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi
index d9c7dd1d95a4..19e29f4af9d6 100644
--- a/arch/arm/boot/dts/stih415.dtsi
+++ b/arch/arm/boot/dts/stih415.dtsi
@@ -10,6 +10,7 @@
#include "stih415-clock.dtsi"
#include "stih415-pinctrl.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset-controller/stih415-resets.h>
/ {
L2: cache-controller {
@@ -28,6 +29,11 @@
ranges;
compatible = "simple-bus";
+ powerdown: powerdown-controller {
+ #reset-cells = <1>;
+ compatible = "st,stih415-powerdown";
+ };
+
syscfg_sbc: sbc-syscfg@fe600000{
compatible = "st,stih415-sbc-syscfg", "syscon";
reg = <0xfe600000 0xb4>;