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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-03 16:07:36 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-10 19:13:44 +0200
commit9e199292d2266489c939f9c890f0d3736d00ba66 (patch)
treea979c2d75ac84b7a9eb372811c9b62b64526a675 /arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
parentccb258ab9199c3b0ea5a3ed3c7d2bc8da3222bf6 (diff)
ARM: sun5i: dt: Fix A10s SoC bus base address
There was a typo in the base address used for the soc node in the A10s device tree. Fix it with the proper base address. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts')
-rw-r--r--arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
index 24dd8bb7df8a..3c9f8b3cd3e3 100644
--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
@@ -18,7 +18,7 @@
model = "Olimex A10s-Olinuxino Micro";
compatible = "olimex,a10s-olinuxino-micro", "allwinner,sun5i-a10s";
- soc@01c20000 {
+ soc@01c00000 {
emac: ethernet@01c0b000 {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_a>;