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authorOlof Johansson <olof@lixom.net>2014-05-21 14:36:06 -0700
committerOlof Johansson <olof@lixom.net>2014-05-21 14:36:06 -0700
commita59a591104ce12547dbf88987dfacfeb8c8d0315 (patch)
tree57791965091f2ac2494cbc413565e41bd3f25377 /arch/arm/boot/dts/sun7i-a20.dtsi
parent0673836c0b3e99d8cdaeeecbc7f685e894c97cca (diff)
parent209394aed532c5de9bf549f4beac92bf1b80f887 (diff)
Merge tag 'sunxi-dt-for-3.16' of https://github.com/mripard/linux into next/dt
Merge "Allwinner DT additions for 3.16" from Maxime Ripard: - Introduction of the MMC controlers - New board: A10s R7, Mele M9, APP4-EVB1 - Enabled the PMU on the Cortex A7-based SoCs * tag 'sunxi-dt-for-3.16' of https://github.com/mripard/linux: (38 commits) ARM: sunxi: dt: declare the r_pio pin controller for A31 SoC ARM: sunxi: dt: add PRCM clk and reset controller subdevices ARM: sunxi: dt: add APP4-EVB1 board support ARM: sun6i: dt: Add support for the USB controllers ARM: sun6i: Add the USB clocks to the DTSI ARM: dts: sun5i: Add new A10s r7 hdmi tv dongle board ARM: dts: sun7i: Add reg_vcc3v3 to sun7i board mmc nodes ARM: dts: sun6i: Add reg_vcc3v3 to sun6i board mmc nodes ARM: dts: sun5i: Add reg_vcc3v3 to sun5i board mmc nodes ARM: dts: sun4i: Add reg_vcc3v3 to sun4i board mmc nodes ARM: dts: sunxi: Add reg_vcc3v3 supply to sunxi-common-regulators.dtsi ARM: dts: sun7i: Add basic support for the Cubietruck WiFi module ARM: dts: sun7i: Enable mmc controller on various A20 boards ARM: dts: sun7i: Add pin-muxing info for the mmc controllers ARM: dts: sun7i: Add mmc controller nodes ARM: dts: sun6i: Add new sun6i-a31-m9 dts file for Mele M9 ARM: dts: sun6i: Add mmc controller nodes ARM: dts: sun6i: Add mmc clocks ARM: dts: sun5i: Enable mmc controller on various A10s and A13 boards ARM: dts: sun5i: Add mmc controller nodes ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi95
1 files changed, 95 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 32efc105df83..56df970ffe25 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -57,6 +57,12 @@
<1 10 0xf08>;
};
+ pmu {
+ compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
+ interrupts = <0 120 4>,
+ <0 121 4>;
+ };
+
clocks {
#address-cells = <1>;
#size-cells = <1>;
@@ -447,6 +453,42 @@
#size-cells = <0>;
};
+ mmc0: mmc@01c0f000 {
+ compatible = "allwinner,sun5i-a13-mmc";
+ reg = <0x01c0f000 0x1000>;
+ clocks = <&ahb_gates 8>, <&mmc0_clk>;
+ clock-names = "ahb", "mmc";
+ interrupts = <0 32 4>;
+ status = "disabled";
+ };
+
+ mmc1: mmc@01c10000 {
+ compatible = "allwinner,sun5i-a13-mmc";
+ reg = <0x01c10000 0x1000>;
+ clocks = <&ahb_gates 9>, <&mmc1_clk>;
+ clock-names = "ahb", "mmc";
+ interrupts = <0 33 4>;
+ status = "disabled";
+ };
+
+ mmc2: mmc@01c11000 {
+ compatible = "allwinner,sun5i-a13-mmc";
+ reg = <0x01c11000 0x1000>;
+ clocks = <&ahb_gates 10>, <&mmc2_clk>;
+ clock-names = "ahb", "mmc";
+ interrupts = <0 34 4>;
+ status = "disabled";
+ };
+
+ mmc3: mmc@01c12000 {
+ compatible = "allwinner,sun5i-a13-mmc";
+ reg = <0x01c12000 0x1000>;
+ clocks = <&ahb_gates 11>, <&mmc3_clk>;
+ clock-names = "ahb", "mmc";
+ interrupts = <0 35 4>;
+ status = "disabled";
+ };
+
usbphy: phy@01c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun7i-a20-usb-phy";
@@ -540,6 +582,20 @@
#size-cells = <0>;
#gpio-cells = <3>;
+ pwm0_pins_a: pwm0@0 {
+ allwinner,pins = "PB2";
+ allwinner,function = "pwm";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+
+ pwm1_pins_a: pwm1@0 {
+ allwinner,pins = "PI3";
+ allwinner,function = "pwm";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+
uart0_pins_a: uart0@0 {
allwinner,pins = "PB22", "PB23";
allwinner,function = "uart0";
@@ -653,6 +709,27 @@
allwinner,drive = <0>;
allwinner,pull = <0>;
};
+
+ mmc0_pins_a: mmc0@0 {
+ allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+ allwinner,function = "mmc0";
+ allwinner,drive = <2>;
+ allwinner,pull = <0>;
+ };
+
+ mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
+ allwinner,pins = "PH1";
+ allwinner,function = "gpio_in";
+ allwinner,drive = <0>;
+ allwinner,pull = <1>;
+ };
+
+ mmc3_pins_a: mmc3@0 {
+ allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
+ allwinner,function = "mmc3";
+ allwinner,drive = <2>;
+ allwinner,pull = <0>;
+ };
};
timer@01c20c00 {
@@ -678,6 +755,14 @@
interrupts = <0 24 4>;
};
+ pwm: pwm@01c20e00 {
+ compatible = "allwinner,sun7i-a20-pwm";
+ reg = <0x01c20e00 0xc>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
sid: eeprom@01c23800 {
compatible = "allwinner,sun7i-a20-sid";
reg = <0x01c23800 0x200>;
@@ -776,6 +861,8 @@
clocks = <&apb1_gates 0>;
clock-frequency = <100000>;
status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
};
i2c1: i2c@01c2b000 {
@@ -785,6 +872,8 @@
clocks = <&apb1_gates 1>;
clock-frequency = <100000>;
status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
};
i2c2: i2c@01c2b400 {
@@ -794,6 +883,8 @@
clocks = <&apb1_gates 2>;
clock-frequency = <100000>;
status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
};
i2c3: i2c@01c2b800 {
@@ -803,6 +894,8 @@
clocks = <&apb1_gates 3>;
clock-frequency = <100000>;
status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
};
i2c4: i2c@01c2bc00 {
@@ -812,6 +905,8 @@
clocks = <&apb1_gates 15>;
clock-frequency = <100000>;
status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
};
gmac: ethernet@01c50000 {