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authorStephen Warren <swarren@nvidia.com>2012-04-26 11:21:54 -0600
committerStephen Warren <swarren@nvidia.com>2012-05-03 14:49:10 -0600
commit802a849948789b6059899d79a4c8e71db19a6029 (patch)
tree107a2f9e059d83c87db14ec9cd5f79ad67e8ccec /arch/arm/boot/dts/tegra-seaboard.dts
parent22bd1f7ef40a1c0f2ba796ba7cd80013adcb835d (diff)
ARM: dt: tegra seaboard: configure I2C2 pinmux
The I2C2 controller can be routed to either pingroup DDC or PTA. Seaboard actually uses this as an I2C bus mux, and devices are connected to both pingroups. This change statically assigns the I2C2 controller to pingroup PTA, so that on-board devices can be accessed. The DDC pingroup is used for EDID/DDC accesses which are not yet required, given the absence of any Tegra graphics support. I2C muxing will be supported later. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra-seaboard.dts')
-rw-r--r--arch/arm/boot/dts/tegra-seaboard.dts6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 11aea885c1bb..60c94295e594 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -100,7 +100,7 @@
};
hdint {
nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
- "lsck", "lsda", "pta";
+ "lsck", "lsda";
nvidia,function = "hdmi";
};
i2cp {
@@ -134,6 +134,10 @@
nvidia,pins = "pmc";
nvidia,function = "pwr_on";
};
+ pta {
+ nvidia,pins = "pta";
+ nvidia,function = "i2c2";
+ };
rm {
nvidia,pins = "rm";
nvidia,function = "i2c1";