diff options
| author | Stephen Warren <swarren@nvidia.com> | 2012-11-12 12:51:22 -0700 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2012-11-15 15:07:30 -0700 |
| commit | fea221e254e9842df0740688f30f1ce5a692a775 (patch) | |
| tree | 2a514f0a24e7553ef527a7276692762b9358f48c /arch/arm/boot/dts/tegra20-trimslice.dts | |
| parent | fa98a114bf0d1623d502b1ae1e9963ef97808214 (diff) | |
ARM: tegra: trimslice: enable SPI flash
TrimSlice contains a 1MiB SPI flash. Represent this in the device tree.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-trimslice.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-trimslice.dts | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 27fb8a67ea42..f4e0428eb737 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -254,6 +254,16 @@ clock-frequency = <400000>; }; + spi@7000c380 { + status = "okay"; + spi-max-frequency = <48000000>; + spi-flash@0 { + compatible = "winbond,w25q80bl"; + reg = <0>; + spi-max-frequency = <48000000>; + }; + }; + i2c@7000c400 { status = "okay"; clock-frequency = <400000>; |