diff options
| author | Sanchayan Maity <maitysanchayan@gmail.com> | 2016-03-04 17:01:21 +0530 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2016-03-09 13:35:43 -0800 |
| commit | 920879df35a9fc87283dbe853a8330f11bacefa4 (patch) | |
| tree | 68245bfa068405e141095ae534003fd618c8bb0a /arch/arm/boot/dts/vfxxx.dtsi | |
| parent | 3e6216dff018f64eaf2fa37d51105ee08665ccb5 (diff) | |
ARM: dts: vfxxx: Add OCROM and phandle entries for Vybrid SoC bus driver
Add OCROM node and introduce phandles to OCROM, MSCM and NVMEM
OCOTP for use by the Vybrid SoC bus driver.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'arch/arm/boot/dts/vfxxx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/vfxxx.dtsi | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index 69a8c3876b2d..8403401f7d53 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -55,9 +55,19 @@ soc { #address-cells = <1>; #size-cells = <1>; - compatible = "simple-bus"; + compatible = "fsl,vf610-soc-bus", "simple-bus"; interrupt-parent = <&gpc>; ranges; + fsl,rom-revision = <&ocrom 0x80>; + fsl,cpu-count = <&mscm_cpucfg 0x2C>; + fsl,l2-size = <&mscm_cpucfg 0x14>; + nvmem-cells = <&ocotp_cfg0>, <&ocotp_cfg1>; + nvmem-cell-names = "cfg0", "cfg1"; + + ocrom: ocrom@00000000 { + compatible = "fsl,vf610-ocrom", "syscon"; + reg = <0x00000000 0x18000>; + }; ocram0: sram@3f000000 { compatible = "mmio-sram"; |