diff options
| author | Anson Huang <b20788@freescale.com> | 2013-10-14 15:20:52 -0400 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2013-10-30 09:56:00 +0800 |
| commit | a785c61cbf890f85ebea44ff8783e9322d3d8dbe (patch) | |
| tree | e99cee50024637f382f684e6af2dcd8232c1a0b6 /arch/arm/boot/dts | |
| parent | 85e950c3914b214431237769be5b81ada05c1266 (diff) | |
ENGR00283508-4 arm: dts: imx6sl: support kpp pin sleep mode
Improve those kpp pins pad setting with no_pad_ctrl defined,
actually they are using default pad setting, to support pin
mode switch, we need to set them manually.
As i.MX6SL EVK board is very sensitive to DSM power, so we
need to lower IO power of KPP pins:
MX6SL_PAD_KEY_ROW0__KEY_ROW0
MX6SL_PAD_KEY_ROW1__KEY_ROW1
MX6SL_PAD_KEY_ROW2__KEY_ROW2
MX6SL_PAD_KEY_COL0__KEY_COL0
MX6SL_PAD_KEY_COL1__KEY_COL1
MX6SL_PAD_KEY_COL2__KEY_COL2
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6sl-evk.dts | 3 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 17 |
2 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index 8d720a9ee192..466a397b9f4a 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -455,8 +455,9 @@ }; &kpp { - pinctrl-names = "default"; + pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_kpp_1>; + pinctrl-1 = <&pinctrl_kpp_1_sleep>; linux,keymap = < 0x00000067 /* KEY_UP */ 0x0001006c /* KEY_DOWN */ diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index d040ce38091d..d8383641de72 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -990,9 +990,20 @@ MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010 MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010 MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0 - MX6SL_PAD_KEY_COL0__KEY_COL0 0x80000000 - MX6SL_PAD_KEY_COL1__KEY_COL1 0x80000000 - MX6SL_PAD_KEY_COL2__KEY_COL2 0x80000000 + MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0 + MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0 + MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0 + >; + }; + + pinctrl_kpp_1_sleep: kpp_grp_1_sleep { + fsl,pins = < + MX6SL_PAD_KEY_ROW0__GPIO3_IO25 0x3080 + MX6SL_PAD_KEY_ROW1__GPIO3_IO27 0x3080 + MX6SL_PAD_KEY_ROW2__GPIO3_IO29 0x3080 + MX6SL_PAD_KEY_COL0__GPIO3_IO24 0x3080 + MX6SL_PAD_KEY_COL1__GPIO3_IO26 0x3080 + MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x3080 >; }; }; |