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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-02-10 14:31:28 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-02-10 14:31:28 -0800 |
commit | c08f8467939e7d2eebcba7cf2330242c4f53f2f7 (patch) | |
tree | 3430b9acdac374da5fda10d913b52f608494894c /arch/arm/boot | |
parent | bdccc4edeb03ad68c55053b0260bdaaac547bbd9 (diff) | |
parent | cb8e92d8e4d9f8562071b6ab39e1b837e9e7af39 (diff) |
Merge tag 'pci-v3.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI changes from Bjorn Helgaas:
"Enumeration
- Move domain assignment from arm64 to generic code (Lorenzo Pieralisi)
- ARM: Remove artificial dependency on pci_sys_data domain (Lorenzo Pieralisi)
- ARM: Move to generic PCI domains (Lorenzo Pieralisi)
- Generate uppercase hex for modalias var in uevent (Ricardo Ribalda Delgado)
- Add and use generic config accessors on ARM, PowerPC (Rob Herring)
Resource management
- Free resources on failure in of_pci_get_host_bridge_resources() (Lorenzo Pieralisi)
- Fix infinite loop with ROM image of size 0 (Michel Dänzer)
PCI device hotplug
- Handle surprise add even if surprise removal isn't supported (Bjorn Helgaas)
Virtualization
- Mark AMD/ATI VGA devices that don't reset on D3hot->D0 transition (Alex Williamson)
- Add DMA alias quirk for Adaptec 3405 (Alex Williamson)
- Add Wellsburg (X99) to Intel PCH root port ACS quirk (Alex Williamson)
- Add ACS quirk for Emulex NICs (Vasundhara Volam)
MSI
- Fail MSI-X mappings if there's no space assigned to MSI-X BAR (Yijing Wang)
Freescale Layerscape host bridge driver
- Fix platform_no_drv_owner.cocci warnings (Julia Lawall)
NVIDIA Tegra host bridge driver
- Remove unnecessary tegra_pcie_fixup_bridge() (Lucas Stach)
Renesas R-Car host bridge driver
- Fix error handling of irq_of_parse_and_map() (Dmitry Torokhov)
TI Keystone host bridge driver
- Fix error handling of irq_of_parse_and_map() (Dmitry Torokhov)
- Fix misspelling of current function in debug output (Julia Lawall)
Xilinx AXI host bridge driver
- Fix harmless format string warning (Arnd Bergmann)
Miscellaneous
- Use standard parsing functions for ASPM sysfs setters (Chris J Arges)
- Add pci_device_to_OF_node() stub for !CONFIG_OF (Kevin Hao)
- Delete unnecessary NULL pointer checks (Markus Elfring)
- Add and use defines for PCIe Max_Read_Request_Size (Rafał Miłecki)
- Include clk.h instead of clk-private.h (Stephen Boyd)"
* tag 'pci-v3.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits)
PCI: Add pci_device_to_OF_node() stub for !CONFIG_OF
PCI: xilinx: Convert to use generic config accessors
PCI: xgene: Convert to use generic config accessors
PCI: tegra: Convert to use generic config accessors
PCI: rcar: Convert to use generic config accessors
PCI: generic: Convert to use generic config accessors
powerpc/powermac: Convert PCI to use generic config accessors
powerpc/fsl_pci: Convert PCI to use generic config accessors
ARM: ks8695: Convert PCI to use generic config accessors
ARM: sa1100: Convert PCI to use generic config accessors
ARM: integrator: Convert PCI to use generic config accessors
PCI: versatile: Add DT-based ARM Versatile PB PCIe host driver
ARM: dts: versatile: add PCI controller binding
of/pci: Free resources on failure in of_pci_get_host_bridge_resources()
PCI: versatile: Add DT docs for ARM Versatile PB PCIe driver
PCI: Fail MSI-X mappings if there's no space assigned to MSI-X BAR
r8169: use PCI define for Max_Read_Request_Size
[SCSI] esas2r: use PCI define for Max_Read_Request_Size
tile: use PCI define for Max_Read_Request_Size
rapidio/tsi721: use PCI define for Max_Read_Request_Size
...
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/versatile-pb.dts | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts index e36c1e82fea7..b83137f66034 100644 --- a/arch/arm/boot/dts/versatile-pb.dts +++ b/arch/arm/boot/dts/versatile-pb.dts @@ -29,6 +29,43 @@ clock-names = "apb_pclk"; }; + pci-controller@10001000 { + compatible = "arm,versatile-pci"; + device_type = "pci"; + reg = <0x10001000 0x1000 + 0x41000000 0x10000 + 0x42000000 0x100000>; + bus-range = <0 0xff>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */ + 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */ + 0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */ + + interrupt-map-mask = <0x1800 0 0 7>; + interrupt-map = <0x1800 0 0 1 &sic 28 + 0x1800 0 0 2 &sic 29 + 0x1800 0 0 3 &sic 30 + 0x1800 0 0 4 &sic 27 + + 0x1000 0 0 1 &sic 27 + 0x1000 0 0 2 &sic 28 + 0x1000 0 0 3 &sic 29 + 0x1000 0 0 4 &sic 30 + + 0x0800 0 0 1 &sic 30 + 0x0800 0 0 2 &sic 27 + 0x0800 0 0 3 &sic 28 + 0x0800 0 0 4 &sic 29 + + 0x0000 0 0 1 &sic 29 + 0x0000 0 0 2 &sic 30 + 0x0000 0 0 3 &sic 27 + 0x0000 0 0 4 &sic 28>; + }; + fpga { uart@9000 { compatible = "arm,pl011", "arm,primecell"; |