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authorBai Ping <b51503@freescale.com>2015-08-06 03:37:44 +0800
committerLeonard Crestez <leonard.crestez@nxp.com>2018-08-23 16:42:35 +0300
commit21cd4d537ed8eb594d7a55ad101273ee81878bf4 (patch)
treed2ad4519a437a98c3ac3e5b953feb714a7e33d79 /arch/arm/boot
parentf72a41e33fdb517a8d115b83ebef3b32aeecf592 (diff)
MLK-11322-01 ARM: dts: imx: add ocram node used for lpm code
Reserve iram space for low power code. The first 16KB space is used for suspend/resume and cpuidle. Another 4KB space is for busfreq code. for i.MX6SX, it has a dedicated ocram space start at 0x8f8000 for low power code. Signed-off-by: Bai Ping <b51503@freescale.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi12
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi16
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi20
5 files changed, 49 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 7aa120fbdc71..e88fd10aafc3 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -60,9 +60,9 @@
};
soc {
- ocram: sram@00900000 {
+ ocram: sram@00905000 {
compatible = "mmio-sram";
- reg = <0x00900000 0x20000>;
+ reg = <0x00905000 0x1B000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 908b269a016b..df00ee25b043 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -79,9 +79,9 @@
};
soc {
- ocram: sram@00900000 {
+ ocram: sram@00905000 {
compatible = "mmio-sram";
- reg = <0x00900000 0x40000>;
+ reg = <0x00905000 0x3B000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index b13b0b2db881..c93631a843e3 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -160,6 +160,18 @@
power-domains = <&gpc 1>;
};
+ ocrams: sram@00900000 {
+ compatible = "fsl,lpm-sram";
+ reg = <0x00900000 0x4000>;
+ clocks = <&clks IMX6QDL_CLK_OCRAM>;
+ };
+
+ ocrams_ddr: sram@00904000 {
+ compatible = "fsl,ddr-lpm-sram";
+ reg = <0x00904000 0x1000>;
+ clocks = <&clks IMX6QDL_CLK_OCRAM>;
+ };
+
timer@00a00600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x00a00600 0x20>;
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 02378db3f5fc..cdebbf3ce380 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -99,9 +99,21 @@
interrupt-parent = <&gpc>;
ranges;
- ocram: sram@00900000 {
+ ocrams: sram@00900000 {
+ compatible = "fsl,lpm-sram";
+ reg = <0x00900000 0x4000>;
+ clocks = <&clks IMX6SL_CLK_OCRAM>;
+ };
+
+ ocrams_ddr: sram@00904000 {
+ compatible = "fsl,ddr-lpm-sram";
+ reg = <0x00904000 0x1000>;
+ clocks = <&clks IMX6SL_CLK_OCRAM>;
+ };
+
+ ocram: sram@00905000 {
compatible = "mmio-sram";
- reg = <0x00900000 0x20000>;
+ reg = <0x00905000 0x1B000>;
clocks = <&clks IMX6SL_CLK_OCRAM>;
};
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index a885052157f0..a0e530781b96 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -143,8 +143,26 @@
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
};
- ocram: sram@00900000 {
+ ocrams: sram@008f8000 {
+ compatible = "fsl,lpm-sram";
+ reg = <0x008f8000 0x4000>;
+ clocks = <&clks IMX6SX_CLK_OCRAM_S>;
+ };
+
+ ocrams_ddr: sram@00900000 {
+ compatible = "fsl,ddr-lpm-sram";
+ reg = <0x00900000 0x1000>;
+ clocks = <&clks IMX6SX_CLK_OCRAM>;
+ };
+
+ ocram: sram@00901000 {
compatible = "mmio-sram";
+ reg = <0x00901000 0x1F000>;
+ clocks = <&clks IMX6SX_CLK_OCRAM>;
+ };
+
+ ocram_mf: sram-mf@00900000 {
+ compatible = "fsl,mega-fast-sram";
reg = <0x00900000 0x20000>;
clocks = <&clks IMX6SX_CLK_OCRAM>;
};