diff options
| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-01-26 22:14:23 +0100 |
|---|---|---|
| committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-06-17 11:09:40 +0200 |
| commit | 4a8d57a54fb21f32ee17e0a61ca54c7a6f8f83da (patch) | |
| tree | e63465bea306778518c6d8e3b3107d2a8a2975cf /arch/arm/boot | |
| parent | 88237c25aa4fe0dad177ae11214136ad78bc908f (diff) | |
ARM: zImage: some comments for __armv3_mpu_cache_on
__armv3_mpu_cache_on seems broken. As there is noone around who knows
about these machines just keep the code as is but point out the strange
things.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/compressed/head.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 390aa92ef04d..7b7d95c84641 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -396,12 +396,18 @@ __armv3_mpu_cache_on: mov r0, #0 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3 + /* + * ?? ARMv3 MMU does not allow reading the control register, + * does this really work on ARMv3 MPU? + */ mrc p15, 0, r0, c1, c0, 0 @ read control reg @ .... .... .... WC.M orr r0, r0, #0x000d @ .... .... .... 11.1 + /* ?? this overwrites the value constructed above? */ mov r0, #0 mcr p15, 0, r0, c1, c0, 0 @ write control reg + /* ?? invalidate for the second time? */ mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3 mov pc, lr |